Zobrazeno 1 - 10
of 15
pro vyhledávání: '"M. Meyassed"'
Autor:
E. Maayan, null Ran Dvir, J. Shor, null Yan Polansky, Y. Sofer, I. Bloom, D. Avni, B. Eitan, Z. Cohen, M. Meyassed, Y. Alpern, H. Palm, E. Stain v. Kamienski, P. Haibach, D. Caspary, S. Riedel, R. Knofler
Publikováno v:
2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315).
Publikováno v:
Proceedings of the 34th Design Automation Conference.
Publikováno v:
Proceedings VHDL International Users' Forum. Fall Conference.
This paper presents improvements to the Advanced Design Environment Prototype Tool (ADEPT) that have been developed under the RASSP (Rapid Prototyping of Application Specific Signal Processors) program. ADEPT is an integrated design environment based
Publikováno v:
ICECCS
The design of complex systems requires an enormous amount of modeling and simulation at the various levels of detail to assure high quality results. Most design methodologies require the use of separate modeling languages and simulation environments
Autor:
M. Meyassed, Y. Nemirovsky
Publikováno v:
Applied Physics Letters. 59:2439-2441
Hg1−xCdxTe metal‐insulator‐semiconductor (MIS) devices with x≂0.22 often exhibit very short storage times that are determined by minority‐carrier dark currents. This study describes a novel system, for measuring the fast collapse of such de
Publikováno v:
DAC
This paper presents an integrated design environment thatsupports the design and analysis of digital systems from initialconcept to the final implementation. The environment supports bothsystem level performance and dependability analysis from acommo
Publikováno v:
AIP Conference Proceedings.
Carrier trapping influences the performance of HgCdTe infrared detectors in the 8–12 μm range by enhancing tunneling currents, reducing excess carrier lifetimes, and increasing g–r and 1/f noise. In this work, the effects of carrier trapping on
Autor:
Dirk Caspary, D. Avni, M. Meyassed, Joseph Shor, Herbert Palm, S. Riedel, P. Haibach, Yair Sofer, Y. Polansky, Eduardo Maayan, Z. Cohen, B. Eitan, R. Knofler, E.S. v Kamienski, Y. Alpern, I. Bloom, R. Dvir
Publikováno v:
Scopus-Elsevier
The NROM technology is applied to EEPROM, flash, and data storage product lines. All the products are based on the two-bit-per-cell core technology, using common design concepts, algorithms, circuits, and the same process architecture. Differing prod
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::121c37f58800871f14926f2f23ddbed6
http://www.scopus.com/inward/record.url?eid=2-s2.0-0036224246&partnerID=MN8TOARS
http://www.scopus.com/inward/record.url?eid=2-s2.0-0036224246&partnerID=MN8TOARS
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Akademický článek
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