Zobrazeno 1 - 10
of 170
pro vyhledávání: '"M. Juhel"'
Autor:
E. Brezza, F. Deprat, C. de Buttet, A. Gauthier, M. Gregoire, D. Guiheux, V. Guyader, M. Juhel, I. Berbezier, E. Assaf, L. Favre, P. Chevalier, C. Gaquière, N. Defrance
Publikováno v:
Solid-State Electronics
Solid-State Electronics, 2023, 204, pp.108654. ⟨10.1016/j.sse.2023.108654⟩
Solid-State Electronics, 2023, 204, pp.108654. ⟨10.1016/j.sse.2023.108654⟩
International audience; A B S T R A C THeterojunction Bipolar Transistors needed for high-frequency applications require precise dopant control. Insitu doped epitaxies used during device fabrication rely on surface preparation to obtain an optimized
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0cfe18456e4b23e3772456d19857235a
https://hal.science/hal-04084450
https://hal.science/hal-04084450
Autor:
J. Lespiaux, F. Deprat, B. Rodrigues Goncalves, J. Souc, F. Leverd, M. Juhel, J.-G. Mattei, C. Giroud-Garampon, A. Roman, T. Magis, J.M. Hartmann
Publikováno v:
Materials Science in Semiconductor Processing. 144:106549
Autor:
Fabrizio Fausto Renzo Toia, Maria Luisa Polignano, I. Mica, Jacopo Frascaroli, S. Vangelista, M. Caniatti, M. Juhel, R. Piagge
Publikováno v:
ECS Journal of Solid State Science and Technology. 7:P583-P587
Autor:
Z.T. Kiss, D. Brazzelli, I. Mica, P. Monge Roffarello, A. Galbiati, Maria Luisa Polignano, P. Bacciaglia, M. Juhel, S. Grasso, E. Tomezzoli, Andrea Mario Torti, D. Cseh
Publikováno v:
Materials Today: Proceedings. 5:14778-14784
The objective of this paper is to study the phenomenology of the extended defects generated by phosphorus (P) implantations in silicon with a special attention to the interaction with a previous implantation of the same specie already recovered by a
Akademický článek
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Akademický článek
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Publikováno v:
Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms. 237:148-154
Standard gate materials are compared to Ge implanted poly-Si and deposited poly-SiGe. It is demonstrated in this paper that the electrical resistance of the gate is significantly reduced via the use of poly-SiGe (from 30% to 40% decrease in resistanc
Autor:
Z. Fang, Damien Lenoble, M Juhel, Y Rault, Jay T. Scheuer, J.-P Reynard, F. Lallement, Steven R. Walther, Ludovic Godet, A. Grouillet
Publikováno v:
Surface and Coatings Technology. 186:17-20
As semiconductor devices keep shrinking in size, the fabrication of ultra-shallow junctions (USJ) is becoming a key issue for future CMOS technologies. In this study, we propose for the first time to demonstrate and extensively characterize the capab
Publikováno v:
Microelectronic Engineering. 50:425-431
A detailed study of copper contaminating steps performed during integration of multilevel Cu metallisation in dual damascene architecture has been performed. Contamination at the wafer back and the bevel edge should make it difficult to use the same
Publikováno v:
Microelectronic Engineering. 50:369-374
Integration of Cu-CVD as metallization for on-chip interconnect requires an efficient barrier to avoid any Cu diffusion in the insulating material. These barriers must also promote adhesion of Cu to the inter- and intra-metal level material, and have