Zobrazeno 1 - 5
of 5
pro vyhledávání: '"M. J. B. Bolt"'
Publikováno v:
IEEE Transactions on Semiconductor Manufacturing. 4:193-198
A simple and cost-effective method for evaluating the parametric product manufacturability of VLSI circuits is presented. The method, named gradient analysis, enables designers to predict the standard deviation of the circuit performance from measure
Publikováno v:
IEEE/SEMI International Symposium on Semiconductor Manufacturing Science.
A first-order statistical worst-case design methodology for VLSI products that is based on uncorrelated groups of geometry- and temperature-independent design parameters has been developed. The parameters are statistically monitored in production by
Publikováno v:
Semiconductor Science and Technology. 2:666-674
The electrical characteristics of the metal-insulator-semiconductor switch (MISS), in which SIPOS is incorporated as the semi-insulator, are presented. The variations of the device characteristics with temperature and light intensity are reported. A
The DC performance of silicided N-channel devices is characterised primarily by the current drive capability. However, this is adversely influenced by the series resistance of the device which arises primarily from the lightly doped region located be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d797c4364ac72cdf04bc3f572aebbaac
https://doi.org/10.1007/978-3-642-52314-4_174
https://doi.org/10.1007/978-3-642-52314-4_174
To enhance the design of CMOS circuits a new method, named Gradient Analysis, has been proposed and verified. Gradient Analysis enables designers to realistically predict the standard deviation of the circuit performance from measured or guesstimated
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7204f6f87a7285fece133dc7b356d071
https://doi.org/10.1007/978-3-642-52314-4_65
https://doi.org/10.1007/978-3-642-52314-4_65