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pro vyhledávání: '"M. A. Ahaneku"'
Autor:
V. C. Chijindu, O. K. Ugwueze, C. C. Udeze, M. A. Ahaneku, J. N. Eneh, O. M. Ezeja, E. C. Anoliefo
This paper presents a cache performance model for embedded systems. The need for efficient cache design in embedded systems has led to the exploration of various methods of design for optimal cache configurations for embedded processor. Better users
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=od______2659::21ff28f97f9ee8727b4efbf586ae7c98
https://zenodo.org/record/5540266
https://zenodo.org/record/5540266
