Zobrazeno 1 - 10
of 146
pro vyhledávání: '"M Niiro"'
Publikováno v:
Plasma Physics and Controlled Fusion. 65(6)
Plasma β dependence of ion temperature gradient (ITG) driven turbulence is investigated using gyrokinetic simulations, where β is the normalized pressure. In our β scan, self-consistent magnetohydrodynamic (MHD) equilibrium state is numerically ca
Akademický článek
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Autor:
H. Matsuoka, Atsushi Hachisuka, Hideyuki Noda, K. Shigeta, Kenji Anami, Fukashi Morishita, Isamu Hayashi, A. Amo, M. Niiro, M. Okamoto, T. Gyohten, Tatsuo Kasaoka, Katsumi Dosaka, K. Takahashi, Kazutami Arimoto, H. Shinkawata, T. Yoshihara, K. Fujishima
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:204-212
An embedded DRAM macro with a self-adjustable timing control (STC) scheme, a negative edge transmission scheme (NET), and a power-down data retention (PDDR) mode is developed. A 13.98-mm/sup 2/ 16-Mb embedded DRAM macro is fabricated in 0.13 /spl mu/
Autor:
W. Abe, H. Tanizaki, Hirohito Kikukawa, T. Kawasaki, Takaharu Tsuji, H. Kato, Tsukasa Ooishi, M. Ishikawa, K. Takahashi, M. Maruta, Hideto Hidaka, S. Sakamoto, Y. Fukushima, T. Inokuchi, T. Uchikoba, Shigeki Tomishima, A. Shibayama, M. Niiro, M. Senoh
Publikováno v:
IEEE Journal of Solid-State Circuits. 36:1728-1737
This paper describes a 32-Mb embedded DRAM macro fabricated using 0.13-/spl mu/m triple-well 4-level Cu embedded DRAM technology, which is suitable for portable equipment of MPEG applications. This macro can operate 230-MHz random column access even
Autor:
H. Matsuoka, M. Okamoto, A. Amo, K. Takahashi, Isamu Hayashi, Kazutami Arimoto, Katsumi Dosaka, Tatsuo Kasaoka, Atsushi Hachisuka, K. Shigeta, M. Niiro, Fukashi Morishita, T. Gyohten, H. Shinkawata
Publikováno v:
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).
An embedded DRAM macro with self-adjustable timing control and a power-down data retention scheme is described. A 16Mb test chip is fabricated in a 0.13/spl mu/m low-power process and it achieves 312MHz random cycle operation. Data retention power is
Publikováno v:
Records of the 1993 IEEE International Workshop on Memory Testing.
The authors describe a new high-speed Shmoo plot algorithm for ULSI memory devices. The proposed boundary search method is 8 times faster than the conventional (linear searching) method. Using this method the evaluation time of a 64 Mbit memory is re
Autor:
Takaharu Tsuji, H. Tanizaki, M. Ishikawa, Hideto Hidaka, M. Niiro, K. Takahashi, Akinori Shibayama, M. Senoh, T. Uchikoba, Shigeki Tomishima, Hirohito Kikukawa, T. Inokuchi, Y. Fukushima, H. Kato, S. Sakamoto, M. Maruta, T. Ooishi, W. Abe, T. Kawasaki
Publikováno v:
2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
Previous embedded DRAMs (eDRAMs) have the dual ports on the sense amplifier and wide I/O buses on memory arrays for high data rate in graphic controller chips. This causes decreased cell efficiency and increased power consumption in burst operation c
Publikováno v:
Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169).
A shared built-in self-repair analysis scheme (Shared-BISA) for multiple embedded memory cores in the SOC is proposed to realize minimum area penalty independent of the number of embedded memory cores. A compact reconfigurable CAM array in the BISA c
Publikováno v:
ITC
A new practical built-in self-repair analyzer algorithm for embedded DRAMs (e-DRAM) achieves 100% detection ability of the repairable chips with 1% area penalty of the target 32 Mb embedded DRAM by 4 parallel analyzers. It works at as fast as 500 MHz
Publikováno v:
Rhinology. 35(4)
A rare case--only the fourth as known--of a nasal schwannoma with intracranial extension is presented. A 28-year-old Japanese man complained of right nasal obstruction and bleeding for one year. A biopsy indicated the presence of a nasal schwannoma.