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Autor:
Vivek De, Stephen Kim, Bibiche M. Geuskens, Rinkle Jain, Muhammad M. Khellah, James W. Tschanz, Jaydeep P. Kulkarni
Publikováno v:
IEEE Journal of Solid-State Circuits. 49:917-927
A fully integrated switched capacitor voltage regulator (SCVR) with on-die high density MIM capacitor, distributed across a 14 KB register file (RF) load is demonstrated in 22 nm tri-gate CMOS. The multi-conversion-ratio SCVR provides a wide output v
Publikováno v:
AIAA Journal. 51:2114-2125
A modified linear-membrane formulation for the analysis of orthotropic axisymmetric shells is presented to assess the stresses and deformations in the torus and multitorus after pressurization. The multitorus is a conformable toroidal pressure vessel
Publikováno v:
Aerospace Science and Technology. 29:18-27
Due to highly redundant and strongly coupled control surface configurations of future aircraft, advanced control allocation algorithms have been proposed to optimize the allocation of control power to control surfaces. These algorithms typically assu
Publikováno v:
Journal of Aircraft. 49:991-1007
Autor:
Shih-Lien Lu, Bibiche M. Geuskens, Paolo Aseron, Carlos Tokunaga, Tanay Karnik, James W. Tschanz, Muhammad M. Khellah, Vivek De, Keith Bowman, Christopher B. Wilkerson, Arijit Raychowdhury
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 1:208-217
Built-in resiliency features enable a microprocessor to detect and correct errors due to fast dynamic voltage droop events as well as other types of dynamic variations. Timing errors in the microprocessor core as well as read (RD) and write (WR) erro
Autor:
Vivek De, Carlos Tokunaga, Tanay Karnik, Keith Bowman, J. Tschanz, Shih-Lien Lu, Arijit Raychowdhury, Bibiche M. Geuskens, Paolo Aseron, Muhammad M. Khellah
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 58:2017-2025
A 45 nm microprocessor integrates an all-digital dynamic variation monitor (DVM) to continuously measure the impact of dynamic parameter variations on circuit-level performance to enhance silicon debug and adaptive clock control. The DVM consists of
Publikováno v:
AIAA Journal. 49:1683-1692
This paper outlines the structural analysis of an articulated pressurizable structure termed the multibubble. The multibubble is a structurally efficient pressure vessel that pressurizes a volume with substantial spatial freedom. Applications are fou
Autor:
Tanay Karnik, Muhammad M. Khellah, Vivek De, Shih-Lien Lu, Bibiche M. Geuskens, Keith Bowman, James W. Tschanz, Arijit Raychowdhury
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:797-805
Infrequent dynamic events like VCC droops and temperature changes result in the use of a static VCC guardband in 8T SRAM arrays. This paper proposes the use of tunable replica bits (TRBs) as a potential solution to mitigating a part of the VCC guardb
Autor:
Carlos Tokunaga, Tanay Karnik, Keith Bowman, Vivek De, Christopher B. Wilkerson, J. Tschanz, Bibiche M. Geuskens, Arijit Raychowdhury, Muhammad M. Khellah, Shih-Lien Lu, Paolo Aseron
Publikováno v:
IEEE Journal of Solid-State Circuits. 46:194-208
A 45 nm microprocessor core integrates resilient error-detection and recovery circuits to mitigate the clock frequency (FCLK) guardbands for dynamic parameter variations to improve throughput and energy efficiency. The core supports two distinct erro