Zobrazeno 1 - 10
of 27
pro vyhledávání: '"Lynn T.-N. Wang"'
Autor:
Lynn T. N. Wang, Klaus-Peter Johnsen, Ivan Tanev, Fadi Batarseh, Chang Su, Pouya Rezaeifakhr, Uwe Paul Schroeder
Publikováno v:
DTCO and Computational Patterning II.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ea2ee437179c5938d9cd6e589f249426
https://doi.org/10.1117/12.2658646
https://doi.org/10.1117/12.2658646
Autor:
Lynn T. N. Wang, Uwe Paul Schroeder, Punitha Selvam, Fadi Salameh Batarseh, Pouya Rezaeifakhr, Ariel de Jesus Reyes Ruiz, Teodora Nicolae, Ivan Tanev, Sriram Madhavan
Publikováno v:
DTCO and Computational Patterning.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::0294b0817b7f623bad62e21463b51049
https://doi.org/10.1117/12.2614460
https://doi.org/10.1117/12.2614460
Autor:
Rais Huda, Zhao Chuan Lee, Sriram Madhavan, Michael Simcoe, Uwe Paul Schroeder, Vikas Mehrotra, Lynn T.-N. Wang, Mckay Thomas G
Publikováno v:
Design-Process-Technology Co-optimization XV.
Electrical Design-for-Manufacturability (DFM) checks are developed to quantify layout enhancements and their impact on circuit performance for analog designs. A database containing circuit topologies of analog matched devices is built. Then, connecti
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1c94d00d01d3ce407d3ceaba4c9dfc59
https://doi.org/10.1117/12.2583839
https://doi.org/10.1117/12.2583839
Autor:
Zhao Chuan Lee, Uwe Paul Schroeder, Michael Simcoe, Janam Bakshi, Vikas Mehrotra, Gail Katzman, Rais Huda, Lynn T.-N. Wang, Ahmed Abdulghany, Sriram Madhavan
Publikováno v:
Design-Process-Technology Co-optimization for Manufacturability XIV.
A symmetry-aware DFM layout insertion flow for matched circuits is developed for enhancing analog and mixed-signal designs. Pattern capture is used to categorize the matched circuits to unique groups of layout patterns and store them in a pattern dat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e6929f63144d465e5975002f4ffc75c5
https://doi.org/10.1117/12.2551945
https://doi.org/10.1117/12.2551945
Autor:
Michael Simcoe, Uwe Paul Schroeder, Sriram Madhavan, Gail Katzman, Rais Huda, Blackwell Don Raymond, Yongfu Li, Lynn T.-N. Wang, Ahmed Abdulghany, Thomas Hermann, Mckay Thomas G, Janam Bakshi, Zhao Chuan Lee, Vikas Mehrotra
Publikováno v:
Design-Process-Technology Co-optimization for Manufacturability XIII.
A suite of DFM enablement is enhanced to address the unique needs of analog, RF, and mmWave designs in the custom design flow. The DFM rules and patterns are made stricter beyond baseline requirements, and new DFM rules and patterns are added to furt
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::014484dc2a7baeb39cff5c40a7915223
https://doi.org/10.1117/12.2514769
https://doi.org/10.1117/12.2514769
Autor:
Sriram Madhavan, Lynn T.-N. Wang
Publikováno v:
Design-Process-Technology Co-optimization for Manufacturability XII.
A pattern matching and rule-based polygon clustering methodology with DFM scoring is proposed to detect decomposition-induced manufacturability detractors and fix the layout designs prior to manufacturing. A pattern matcher scans the layout for pre-c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2b4edfd6c4f0e7e9ea19f1ed9ed2fd41
https://doi.org/10.1117/12.2297508
https://doi.org/10.1117/12.2297508
Publikováno v:
SPIE Proceedings.
A pattern-based methodology for optimizing SADP-compliant layout designs is developed based on identifying cut mask patterns and replacing them with pre-characterized fixing solutions. A pattern-based library of difficult-tomanufacture cut patterns w
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dcf202d96d6f90bb1c55089745001cc2
https://doi.org/10.1117/12.2258061
https://doi.org/10.1117/12.2258061
Publikováno v:
IEEE Transactions on Device and Materials Reliability. 11:378-386
Uniaxial stress is widely used in advanced CMOS technologies to boost transistor performance. Conventional compact transistor models rely on empirical fitting of the average channel stress value to predict mobility and, hence, transistor performance.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::009d60dfead11cfaafb33314ff6c552a
https://doi.org/10.1109/tdmr.2011.2144598
https://doi.org/10.1109/tdmr.2011.2144598
Publikováno v:
SPIE Proceedings.
A pattern-based methodology for optimizing stitches is developed based on identifying stitch topologies and replacing them with pre-characterized fixing solutions in decomposed layouts. A topology-based library of stitches with predetermined fixing s
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::87399d3ef8e521a66b91c7761451d4ff
https://doi.org/10.1117/12.2085955
https://doi.org/10.1117/12.2085955
Publikováno v:
SPIE Proceedings.
Decomposition-aware layout design improvements for 8, 9, 11, and 13-track 20/14nm standard cells are presented. Using a decomposition-aware scoring methodology that quantifies the manufacturability of layouts, the Double Patterning Technology (DPT)-c
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1d6810cf3b27adffd2e4eb9b00fc6dce
https://doi.org/10.1117/12.2046147
https://doi.org/10.1117/12.2046147