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pro vyhledávání: '"Lukáš Kohútka"'
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 13, Iss 2, p 33 (2023)
The shrinking of technology nodes allows higher performance, but susceptibility to soft errors increases. The protection has been implemented mainly by lockstep or hardened process techniques, which results in a lower frequency, a larger area, and hi
Externí odkaz:
https://doaj.org/article/5239931a5ff14babac5dd97f066158a4
Autor:
Lukáš Kohútka
Publikováno v:
Journal of Low Power Electronics and Applications, Vol 12, Iss 3, p 39 (2022)
This paper presents a novel SRAM-based architecture of a data structure that represents a set of multiple priority queues that can be implemented in FPGA or ASIC. The proposed architecture is based on shift registers, systolic arrays and SRAM memorie
Externí odkaz:
https://doaj.org/article/e532b430b34941a392261b4ff59b5166
Autor:
Lukáš Kohútka, Ján Mach
Publikováno v:
Electronics; Volume 12; Issue 8; Pages: 1870
This research demonstrates a novel design of an FPGA-implemented task scheduler for real-time systems that supports both aperiodic and periodic tasks. The periodic tasks are automatically restarted once their period has expired without any need for s