Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Luis F. Gonzalez-Perez"'
Publikováno v:
IEEE Transactions on Circuits and Systems I: Regular Papers. 63:716-726
Continuous phase modulation (CPM) is widely employed in digital communication systems due to its high spectral efficiency. The main digital implementations originate in the well-known ROM-based approach. In this approach, the memory size may be very
Publikováno v:
ReConFig
An FPGA implementation of a highly parallel and configurable architecture for turbo decoding, compliant with the 3GPP-LTE standard is presented. This architecture can be integrated in reconfigurable platforms for software defined radio applications.
Publikováno v:
ReConFig
This article presents a VLSI (Very Large Scale of Integration) architecture for the QR decomposition (QRD) based on the Modified Complex Givens Rotations (MCGR) algorithm. Being the QRD a fundamental matrix-computation tool for factorizing matrices (
Publikováno v:
Journal of Engineering, Vol 2013 (2013)
Journal of Engineering (United States)
Journal of Engineering (United States)
This paper presents a VLSI architecture for the suboptimal hard-output Vertical-Bell Laboratories Layered Space-Time (V-BLAST) algorithm in the context of Spatial Multiplexing Multiple-Input Multiple-Output (SM-MIMO) systems immersed in Rayleigh fadi
Publikováno v:
ReConFig
This article presents a VLSI architecture for the K-best Sphere-Decoder (K-best SD) algorithm as a hard-output detector in the context of SM-MIMO (Spatial Multiplexing Multiple-Input Multiple-Output) systems immersed in Rayleigh fading channels. The
Autor:
Ramon Parra-Michel, Héctor Borrayo-Sandoval, Fernando Landeros Printzen, Claudia Feregrino-Uribe, Luis F. Gonzalez-Perez
Publikováno v:
ReConFig
During the last decade, Turbo codes have been taking an increasing importance in channel coding due to its good performance in error correction. One key component in Turbo codes is the interleaver/deinterleaver pair, often designed as reconfigurable
Publikováno v:
ReConFig
FPOAs are reconfigurable devices similar to FPGAs but offer a much higher level of abstraction than the gate level. The main advantage of FPOAs is their deterministic on chip network, which guarantees that an application executes at the design freque
Publikováno v:
Journal of Engineering, Vol 2013 (2013)
This paper presents a VLSI architecture for the suboptimal hard-output Vertical-Bell Laboratories Layered Space-Time (V-BLAST) algorithm in the context of Spatial Multiplexing Multiple-Input Multiple-Output (SM-MIMO) systems immersed in Rayleigh fadi
Externí odkaz:
https://doaj.org/article/6a0f9498f112480cbd963f43affff834