Zobrazeno 1 - 10
of 22
pro vyhledávání: '"Louwsma, S.M."'
Autor:
Bindra, Harijot Singh, Annema, Anne J., Louwsma, S.M., van Tuijl, Adrianus Johannes Maria, Nauta, Bram
Publikováno v:
ESSCIRC 2017-43rd IEEE European Solid State Circuits Conference
A 10-bit 1MS/s SAR ADC in 65nm CMOS is presented that introduces an Energy-Reduced-Sampling (ERS) technique to reduce the input drive energy for Nyquist rate ADCs. Our ADC occupies an area of 0.048 mm2, and achieves an SFDR of 67 dB, an SNDR of 56 dB
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=narcis______::6fdfbc6f4e5fe3f1f99f6e442e5c8e3f
https://research.utwente.nl/en/publications/7dbbb27e-0e8d-4320-924d-77e689bb6638
https://research.utwente.nl/en/publications/7dbbb27e-0e8d-4320-924d-77e689bb6638
Autor:
Louwsma, S.M., Vertregt, Maarten
A sampling circuit for sampling a signal is disclosed. The sampling circuit comprises a plurality of sampling channels adapted to sample the signal in time-multiplexed fashion, each sampling channel comprising a respective track-and-hold circuit conn
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::fc025a15aae6cddef7bf6bfc425eeb80
https://research.utwente.nl/en/publications/signal-sampling-circuit(49b5407f-bdd2-4c53-9294-561a8a70c01a).html
https://research.utwente.nl/en/publications/signal-sampling-circuit(49b5407f-bdd2-4c53-9294-561a8a70c01a).html
Autor:
Louwsma, S.M., Vertregt, Maarten
During successive approximation analog to digital conversion a series of successive digital reference values is selected that converges towards a digital representation of an analog input signal. An analog reference signal is generated dependent on t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=narcis______::78013071cc97cc287c732dd52b688b17
https://research.utwente.nl/en/publications/circuit-with-a-successive-approximation-analog-to-digital-converter(ed88c9b6-5f9a-4e85-a505-d56e05cb5468).html
https://research.utwente.nl/en/publications/circuit-with-a-successive-approximation-analog-to-digital-converter(ed88c9b6-5f9a-4e85-a505-d56e05cb5468).html
Autor:
Louwsma, S.M., Vertregt, Maarten
The present application relates to an apparatus comprising a first transistor element, with at least three terminals, and at least one switching unit. The present application relates also to a method, computer readable medium having a computer progra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::0af493609872eed20f4103189b88a5d8
https://research.utwente.nl/en/publications/timeinterleaved-track-and-hold(e51dc6fe-08bd-49be-bbe3-059ae45037ad).html
https://research.utwente.nl/en/publications/timeinterleaved-track-and-hold(e51dc6fe-08bd-49be-bbe3-059ae45037ad).html
Autor:
Louwsma, S.M.
This thesis describes the feasibility of an analog-to-digital converter (ADC) with a sample-rate of 1-2 GS/s, a resolution of 8-10 bits, and a state-of-the-art power efficiency of less than 1 pJ/conversion step. The time-interleaved architecture expl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::54346ebe397148dcc0cb2ae5c41d37dc
https://doi.org/10.3990/1.9789036529440
https://doi.org/10.3990/1.9789036529440
Publikováno v:
2007 IEEE Custom Integrated Circuits Conference, 329-332
STARTPAGE=329;ENDPAGE=332;TITLE=2007 IEEE Custom Integrated Circuits Conference
STARTPAGE=329;ENDPAGE=332;TITLE=2007 IEEE Custom Integrated Circuits Conference
—A 16-channel time-interleaved Track and Hold is presented. Three techniques are introduced enabling a high bandwidth and linearity and good timing alignment. Integrated ADCs are used to evaluate the performance of the T/H. Single channel performan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=narcis______::4d838f19fe5cbd2268f6998a7957b8e5
https://research.utwente.nl/en/publications/33be89d8-d693-42f6-b3ef-34992ab06af1
https://research.utwente.nl/en/publications/33be89d8-d693-42f6-b3ef-34992ab06af1
The invention relates to a mixer circuit comprising an input node for receiving an input signal, a first output node 202, and a second output node 203, voltage to current conversion means and switching means operatively coupled to each other and to t
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::59d6baef2f56e484cf6e22bf8bc118e1
https://research.utwente.nl/en/publications/mixer-circuit-receiver-comprising-a-mixer-circuit-wireless-communication-comprising-a-receiver-method-for-generating-an-output-signal-by-mixing-an-input-signal-with-an-oscillator-signal(d981e84d-3680-4352-bbf3-92a4cb9ba794).html
https://research.utwente.nl/en/publications/mixer-circuit-receiver-comprising-a-mixer-circuit-wireless-communication-comprising-a-receiver-method-for-generating-an-output-signal-by-mixing-an-input-signal-with-an-oscillator-signal(d981e84d-3680-4352-bbf3-92a4cb9ba794).html
Publikováno v:
MESA+ Day 2004
the 14th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2003), 202-206
STARTPAGE=202;ENDPAGE=206;TITLE=the 14th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2003)
the 14th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2003), 202-206
STARTPAGE=202;ENDPAGE=206;TITLE=the 14th ProRisc workshop on Circuits, Systems and Signal Processing (ProRisc 2003)
Mixers are commonly used in communication systems for frequency translation, and usually exploit switching in some form to implement multiplication by a square wave. However, at the low supply voltages required for new CMOS technologies, switches are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::72a05a9c3066b9c176f9b8c9d5e3fc32
https://research.utwente.nl/en/publications/switched-transconductor-mixer-compatible-with-future-cmos(f20805a8-85cc-4665-8feb-f00042e4dcf0).html
https://research.utwente.nl/en/publications/switched-transconductor-mixer-compatible-with-future-cmos(f20805a8-85cc-4665-8feb-f00042e4dcf0).html
Publikováno v:
2007 IEEE Custom Integrated Circuits Conference; 2007, p329-332, 4p
Publikováno v:
Proceedings of the 30th European Solid-State Circuits Conference; 2004, p343-346, 4p