Zobrazeno 1 - 10
of 394
pro vyhledávání: '"Logic analyzer"'
Autor:
Lazarević Đorđe, Ćirić Jovan
Publikováno v:
Scientific Technical Review, Vol 73, Iss 2, Pp 42-47 (2023)
This paper presents the analysis of CAN communication protocol operation which actually is a communication between the nodes utilizing different types of sensors. The system consists of multiple nodes with microcontrollers of different architectures.
Externí odkaz:
https://doaj.org/article/d7d15639dd0b43c18fbbc3dc9e873d80
Autor:
Alexey M. Romanov
Publikováno v:
HardwareX, Vol 9, Iss , Pp e00164- (2021)
Most of market-available logic analyzers are designed for hardware debug purposes and cannot record continuous measurement in long-term while in different fields of scientific research it is necessary to make data acquisition within small periods (le
Externí odkaz:
https://doaj.org/article/88191016fdf14aec8b681bd2fc89209f
Akademický článek
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Autor:
Lind, Anton
Testing, verification and validation of sensors, components and systems is vital in the early-stage development of new cars with computer-in-the-car architecture. This can be done with the help of the existing technique, hardware-in-the-loop (HIL) te
Externí odkaz:
http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-505963
Autor:
Lev Kirischian, Vadim Geurkov
Publikováno v:
NEWCAS
In this paper, we propose a novel approach to designing an algebraic signature analyzer that can be employed for mixed-signal systems testing. Due to its algebraic nature, the analyzer does not contain carry propagating circuitry. This helps to impro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2267eac3a0c471253c518afa9b7d9ba8
https://doi.org/10.32920/21502173.v1
https://doi.org/10.32920/21502173.v1
VEGA 1/0731/2, VEGA 1/0760/21, APVV-19-0392. This paper deals with design of a control system for automated post-fabrication setting/tuning of ASIC parameters. A new computer application that easily and effectively measures and sets the functional pa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::693a90d40dff47fc4647cbdbd345b177
Publikováno v:
Sensors, Vol 21, Iss 6029, p 6029 (2021)
Sensors
Volume 21
Issue 18
Sensors (Basel, Switzerland)
Sensors
Volume 21
Issue 18
Sensors (Basel, Switzerland)
This paper presents a method for implementing the configuration structure of an integrated computational core of a pulsed nuclear quadrupole resonance (NQR) sensor based on a field-programmable gate array (FPGA), which comprises the following modules
Autor:
Manoj Nambiar, Nupur Sumeet
Publikováno v:
FPL
ICPE
ICPE
Recent availability of High-Level Synthesis (HLS) development flow from FPGA vendors like Xilinx [1] and Intel [2] have simplified hardware design development to a great extent. A HLS design development flow includes a compiler which can compile a hi
Publikováno v:
FPL
In recent years, there has been a lot of focus on tools that help the development of FPGA applications. However, unlike the software world, there are not many FPGA tools that help analyze the performance of FPGA applications. Also, as the application
Autor:
Gong Chengxin
Publikováno v:
Modern Instrumentation and Equipment. 1:53-58