Electrical model of an inverter body-biased structure in triple-well technology under pulsed photoelectric laser stimulation

Autor: Borrel, N., Champeix, C., Kussener, E., Rahajandraibe, W., Lisart, M., Dutertre, J.-M., Sarafianos, A.

Publikováno v: In Microelectronics Reliability August-September 2015 55(9-10):1592-1599

Characterization and TCAD simulation of 90 nm technology transistors under continuous photoelectric laser stimulation for failure analysis improvement

Autor: Sarafianos, Alexandre, Llido, R., Gagliano, Olivier, Serradeil, Valérie, Goubier, V., Lisart, M., Haller, G., Pouget, V., Lewis, D., Dutertre, Jean-Max, Tria, Assia

Publikováno v: 19th IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS
19th IEEE INTERNATIONAL SYMPOSIUM ON THE PHYSICAL AND FAILURE ANALYSIS OF INTEGRATED CIRCUITS, Jul 2012, Singapore, Singapore. pp.1-6

International audience; This study is driven by the need to optimize failure analysis methodologies based on laser/silicon interactions, using the functional response of an integrated circuit to local laser stimulation. It is therefore mandatory to u

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::1f874ff400a004cdab189a0134b18eb9
https://hal-emse.ccsd.cnrs.fr/emse-00742705

Electrical model of a PMOS body biased structure in triple-well technology under pulsed photoelectric laser stimulation.

Autor: Borrel, N., Champeix, C., Kussener, E., Rahajandraibe, W., Lisart, M., Sarafianos, A.

Publikováno v: 2015 IEEE 22nd International Symposium on the Physical & Failure Analysis of Integrated Circuits; 2015, p134-137, 4p

Laser-induced fault effects in security-dedicated circuits.

Autor: Leveugle, R., Maistri, P., Vanhauwaert, P., Lu, F., Di Natale, G., Flottes, M.-L., Rouzeyre, B., Papadimitriou, A., Hely, D., Beroulle, V., Hubert, G., De Castro, S., Dutertre, J.-M., Sarafianos, A., Boher, N., Lisart, M., Damiens, J., Candelier, P., Tavernier, C.

Publikováno v: 2014 22nd International Conference on Very Large Scale Integration (VLSI-SoC); 2014, p1-6, 6p

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