Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Leonhard Heiss"'
Autor:
Mamatha Yakkegondi Virupakshappaa, Peter Baumgartner, Georgos Panagopoulos, Leonhard Heiss, Doris Schmitt-Landsiedel, Andreas Lachmann, Reiner Schwab
Publikováno v:
2016 International Conference on Microelectronic Test Structures (ICMTS).
This work presents an improved methodology for CMOS RF reliability assessment with on-chip AC stress circuits. Compared to previous work high frequency stress signals are not only generated on-chip, but are also monitored by an on-chip oscilloscope (
Autor:
N. Pour Aryan, Doris Schmitt-Landsiedel, A. Listl, Georg Georgakos, C. Yilmaz, Leonhard Heiss
Publikováno v:
IOLTS
In safety critical applications precise characterization of circuits to predict the lifetime reliability is a key challenge. This paper proposes a reliability assessment tool to model and simulate the NBTI degradation including its recovery effect du
Publikováno v:
2013 IEEE International Reliability Physics Symposium (IRPS).
In addition to the well-known longtime degradation of CMOS circuits by Bias Temperature Instability (BTI) degradation, short stress pulses and subsequent recovery of parameter shifts can cause inaccurate transient response in CMOS circuits. Aging sim
Autor:
Nasim Pour Aryan, Georg Georgakos, Doris Schmitt-Landsiedel, Anil Narayan Kakade, Leonhard Heiss, Martin Wirnshofer
Publikováno v:
DDECS
The proposed voltage scheme adaptively tunes the supply voltage of digital circuits, according to PVTA variations. By exploiting unused timing margin, produced by state-of-the-art worst-case designs, energy efficiency is significantly increased. In-s
Publikováno v:
2011 International Symposium on Integrated Circuits.
The presented Pre-Error voltage scheme dynamically tunes the supply voltage of digital circuits, according to PVT variations. By exploiting unused timing margin, produced by state-of-the-art worst-case designs, power consumption is minimized. Pre-Err
Publikováno v:
DDECS
In this paper, we present an adaptive voltage scaling (AVS) scheme to tune the supply voltage of digital circuits according to variations. Compared to worst-case designs, which produce fixed and excessively large safety margins, a considerable amount
Autor:
Nasim Pour Aryan, Doris Schmitt-Landsiedel, Martin Wirnshofer, Leonhard Heiss, Georg Georgakos
Publikováno v:
Journal of Circuits, Systems and Computers. 21:1240027
The presented Pre-Error Adaptive Voltage Scaling (AVS) approach tunes the supply voltage of digital circuits dependent on the present Process, Voltage and Temperature variations as well as Aging (PVTA). By exploiting unused timing margin, produced by