Výsledky vyhledávání - "Leonardo Suriano"

Akademický článek

Exploiting Multi-Level Parallelism for Run-Time Adaptive Inverse Kinematics on Heterogeneous MPSoCs

Autor: Leonardo Suriano, Andres Otero, Alfonso Rodriguez, Manuel Sanchez-Renedo, Eduardo De La Torre

Publikováno v: IEEE Access, Vol 8, Pp 118707-118724 (2020)

This paper presents a run-time solver for the inverse kinematics of a robotic arm implemented on a heterogeneous Multi-Processor System-on-Chip (MPSoC). The solver has been formulated as an optimization problem, in which two levels of algorithmic par

Externí odkaz: https://doaj.org/article/4ea99b6ed1af4ccbbdf0d38b6b41865f

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Accelerating a Classic 3D Video Game on Heterogeneous Reconfigurable MPSoCs

Autor: Eduardo de la Torre, David Lima, Leonardo Suriano

Publikováno v: Applied Reconfigurable Computing. Architectures, Tools, and Applications ISBN: 9783030445331
ARC

Heterogeneous Reconfigurable MPSoCs, coupling microprocessors with Programmable Logic, are becoming extremely important in High-Performance Embedded Computing domain where energy consumption is a key factor to be considered by every designer. However

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::9c2cf68ac50876bf129088021b5f278d
https://doi.org/10.1007/978-3-030-44534-8_11

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Multi-Grain Reconfiguration for Advanced Adaptivity in Cyber-Physical Systems

Autor: Eduardo de la Torre, Carlo Sau, Tiziana Fanni, Leonardo Suriano, Alfonso Rodriguez, Luigi Raffo, Francesca Palumbo

Publikováno v: ReConFig
2018 International Conference on Reconfigurable Computing and FPGAs (ReConFig18) | 2018 International Conference on Reconfigurable Computing and FPGAs (ReConFig18) | December 3-5, 2018 | Cancun, Mexico
Archivo Digital UPM
instname

The advent of Cyber-Physical Systems (CPS) is putting designers to the test: during operation, such a kind of systems has to meet multiple and variable requirements coming from the environment, the user or the system itself. Runtime adaptivity allows

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::c7fdc1bfdaeb63a493c49825403a815c
https://doi.org/10.1109/reconfig.2018.8641705

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A Unified Hardware/Software Monitoring Method for Reconfigurable Computing Architectures using PAPI

Autor: D. Madroñal, Leonardo Suriano, Eduardo de la Torre, César Sanz, Alfonso Rodriguez, Eduardo Juarez

Publikováno v: 13rd International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) | 2018 13rd International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) | 9-11 Julio | Lille, France
Archivo Digital UPM
Universidad Politécnica de Madrid
ReCoSoC

In this work, a standard and unified method for monitoring hardware accelerators in Reconfigurable Computing Architectures is proposed, based on a standard software monitoring interface. The open source Performance Application Programming Interface (

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::63dbff3344ea0263c33c3dc7267ed519
http://oa.upm.es/51783/

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Study of HEMTs Thermal Parameters Based on I-V Characteristics Analysis

Autor: Leonardo Suriano, Anna Gina Perri, Roberto Marani

Publikováno v: i-manager's Journal on Electronics Engineering. 5:19-23

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0d791e0ffe547e37fbbbdd670b24fb38
https://doi.org/10.26634/jele.5.4.3541

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Analysis of a heterogeneous multi-core, multi-hw-accelerator-based system designed using PREESM and SDSoC

Autor: Maxime Pelcat, Alfonso Rodriguez, Eduardo de la Torre, Leonardo Suriano, Karol Desnos

Publikováno v: ReCoSoC
12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2017
12th International Symposium on Reconfigurable Communication-Centric Systems-on-Chip, ReCoSoC 2017, Jul 2017, Madrid, Spain. ⟨10.1109/ReCoSoC.2017.8016151⟩
2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) | 2017 12th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC) | 12-14 Julio 2017 | Madrid, Spain
Archivo Digital UPM
Universidad Politécnica de Madrid

International audience; Nowadays, new heterogeneous system technologies are flooding the market: through the past years, it is possible to observe the move from single CPUs to multi-core devices featuring CPUs, GPUs and large FPGAs, such as Xilinx Zy

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8f154f4eeb6cacd9df92cd3e4657a03f
https://doi.org/10.1109/recosoc.2017.8016151

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Dynamic Reconfiguration under RTEMS for Fault Mitigation and Functional Adaptation in SRAM-based SoPCs for Space Systems

Autor: Eduardo de la Torre, Andres Otero, Arturo Perez, Leonardo Suriano

Publikováno v: 2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) | 2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS) | 24-27 July 2017 | Pasadena, CA, USA
Archivo Digital UPM
Universidad Politécnica de Madrid
2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
AHS

This paper describes the integration of a scrubbing strategy and a dynamic reconfiguration mechanism within an FPGA-based heterogeneous System-on-chip, intended to be used as a reconfigurable processor for space applications. Scrubbing offers the pos

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a948126b49f5c86d584d801ec9109a05
https://oa.upm.es/51106/

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DAMHSE: Programming heterogeneous MPSoCs with hardware acceleration using dataflow-based design space exploration and automated rapid prototyping

Autor: Alfonso Rodriguez, Eduardo de la Torre, Florian Arrestier, Karol Desnos, Leonardo Suriano, Julien Heulot, Maxime Pelcat

Publikováno v: Microprocessors and Microsystems: Embedded Hardware Design (MICPRO)
Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, 2019, 71, pp.102882. ⟨10.1016/j.micpro.2019.102882⟩
Microprocessors and Microsystems: Embedded Hardware Design
Microprocessors and Microsystems: Embedded Hardware Design, 2019, 71, pp.102882. ⟨10.1016/j.micpro.2019.102882⟩

Heterogeneous Multiprocessor Systems-on-a-Chip (MPSoCs) with programmable hardware acceleration are currently gaining market share in the embedded device domain. Largest MPSoCs combine several software processing cores with programmable logic. In the

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f0ee2afdc66765d79a01ab8e2706c821
https://doi.org/10.1016/j.micpro.2019.102882

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