Retiming for the global optimization of synchronous sequential circuit.

Autor: Lejmi, S., Kaminska, B., Wagneur, E.

Publikováno v: Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers & Processors; 1994, p398-401, 4p

Synthesis and retiming for the pseudo-exhaustive BIST of synchronous sequential circuits.

Autor: Lejmi, S., Kaminska, B., Ayari, B.

Publikováno v: Proceedings of 1995 IEEE International Test Conference (ITC); 1995, p683-692, 10p

Resynthesis and retiming of synchronous sequential circuits.

Autor: Lejmi, S., Kaminska, B., Wagneur, E.

Publikováno v: 1993 IEEE International Symposium on Circuits & Systems; 1993, p1674-1674, 1p