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Publikováno v:
Electronics Letters. 54:1156-1158
Continuous-rate all-digital reference-less clock and data recovery (CDR) circuit that utilises a sub-harmonic extraction scheme for wide-range frequency detection is presented. In the proposed CDR, the capture range of the frequency locked loop (FLL)
Autor:
Qiwei Huang, Hyunmook Kim, Hyunbae Lee, Lee Dae-Wung, Jinwook Burm, Changzhi Yu, Himchan Park
Publikováno v:
IEICE Electronics Express. 17:20200024-20200024