Zobrazeno 1 - 10
of 43
pro vyhledávání: '"LeRoy Winemberg"'
Autor:
Wei Fu, Joonsung Park, Ender Yilmaz, Mehmet Ince, LeRoy Winemberg, Krishnaswamy Nagaraj, Sule Ozev
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 26:1-18
With the increasing pressure to obtain near-zero defect rates for the automotive industry, there is a need to explore built-in self-test and other non-traditional test techniques for embedded mixed-signal components, such as PLLs, DC-DC converters, a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82327b50c10bed2c50af6d89dfbedf0d
https://doi.org/10.1145/3427911
https://doi.org/10.1145/3427911
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:3237-3250
In this paper, a novel framework is presented for designing lifetime-reliable SoCs with self-adaptation capability against aging-induced degradation. The proposed flow utilizes the existing logic built-in-self-test (LBIST) hardware, and software impl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5c51c529568bc506653e56a04adde78c
https://doi.org/10.1109/tvlsi.2017.2734685
https://doi.org/10.1109/tvlsi.2017.2734685
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 25:2602-2615
Test points are inserted into integrated circuits to increase fault coverage especially in logic built-in self-test schemes. Commercial tools have been developed over the past decade to insert test points in circuits under test, but they are often in
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::03381e381750237977805f8384709561
https://doi.org/10.1109/tvlsi.2017.2704104
https://doi.org/10.1109/tvlsi.2017.2704104
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 36:842-854
Speed binning of system-on-chips (SoCs) using conventional $F_{\mathrm {max}}$ test requires application of complex functional test patterns. Functional workload-based speed binning techniques incur high test-cost in terms of long test-time and compl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::73353442a437d7ddc90b1004ff6c2651
https://doi.org/10.1109/tcad.2016.2602806
https://doi.org/10.1109/tcad.2016.2602806
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 36:855-868
With silicon technology further scaling, the switching activity is getting more intense in modern designs. The large switching activities together with GHz operation frequency can greatly affect the power integrity by generating IR-drop noises. Exces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5706a9730c7b38cbb9436c58c6ac18a2
https://doi.org/10.1109/tcad.2016.2608885
https://doi.org/10.1109/tcad.2016.2608885
Autor:
Ender Yilmaz, LeRoy Winemberg, Krishnaswamy Nagaraj, Mehmet Ince, Sule Ozev, Wei Fu, Joonsung Park
Publikováno v:
ETS
With the increasing pressure to obtain near-zero defect rates for the automotive industry, there is a need to explore built-in self-test and other non-traditional test techniques for embedded mixed-signal components, such as PLLs, DC-DC converters, a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::26935e011ccbc96e5f243555f90a857a
https://doi.org/10.1109/ets.2019.8791533
https://doi.org/10.1109/ets.2019.8791533
Publikováno v:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24:1715-1727
For 45-nm technologies and below, the maximum operation frequency of integrated circuits (ICs) has reached multiple gigahertz. At the same time, the size of modern ICs has increased significantly with several billions of transistors integrated on eac
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d47fbab9ad8c0447daad0f7bf66be922
https://doi.org/10.1109/tvlsi.2015.2492000
https://doi.org/10.1109/tvlsi.2015.2492000
Autor:
Mark Tehranipoor, Allan Dobin, Nisar Ahmed, Steve Palosh, Saji George, Xiaoxiao Wang, Donglin Su, Dat Tran, LeRoy Winemberg
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 34:109-121
As process technology further scales, aging, noise and variations in integrated circuits (ICs) and systems become a major challenge to both the semiconductor and electronic design automation (EDA) industries, which may cause significantly increased m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50cf6495088beb04b6faa6ab9effef81
https://doi.org/10.1109/tcad.2014.2366876
https://doi.org/10.1109/tcad.2014.2366876
Publikováno v:
ITC
This paper presents a built-in self-test (BIST) system for Low-Dropout Regulators (LDO). Since the LDO is a closed-loop system, stability is a very important but oft-untested parameter for embedded LDOs. The proposed BIST system can measure stability
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7cc0755e1443946e62ebd0a4f964eb85
https://doi.org/10.1109/test.2017.8242033
https://doi.org/10.1109/test.2017.8242033
Autor:
Li-C. Wang, Chuanhe Jay Shan, Matthew Nero, Sebastian Siatkowski, Nikolas Sumikawa, LeRoy Winemberg
Publikováno v:
ITC
Outlier screening is a popular approach employed for automotive product lines. There have been many outlier methods proposed. In practice, it is desirable to choose the “best” outlier method. This work develops a notion of applicability associate
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d23040d1b5084fa94337c97fd84390f3
https://doi.org/10.1109/test.2017.8242047
https://doi.org/10.1109/test.2017.8242047