Zobrazeno 1 - 10
of 389
pro vyhledávání: '"Layout Versus Schematic"'
Publikováno v:
Monash University
Graph Drawing ISBN: 9783642002182
Graph Drawing
Graph Drawing ISBN: 9783642002182
Graph Drawing
We present a new network diagram authoring tool, Dunnart, that provides continuous network layout . It continuously adjusts the layout in response to user interaction, while still maintaining the layout style and, where reasonable, the current layout
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::65d026a631621dc7914f0fcf159b5c07
Autor:
Swasti Pujari
Publikováno v:
International Journal for Research in Applied Science and Engineering Technology. 7:663-670
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::44a3553ca8ea51f16929bcf242ef03a9
https://doi.org/10.22214/ijraset.2019.9089
https://doi.org/10.22214/ijraset.2019.9089
Publikováno v:
IET Circuits, Devices & Systems. 13:443-455
Reversible logic is an emerging digital design paradigm which promises low energy dissipation; thanks to its information-lossless nature. True potential of this exciting concept can only be assessed by facing the design of practical complexity applic
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::50535f6bb01a5b0b4e6f5696059e150f
https://doi.org/10.1049/iet-cds.2018.5222
https://doi.org/10.1049/iet-cds.2018.5222
Publikováno v:
Russian Microelectronics. 48:187-196
In this paper, we address the problem of converting a flat CMOS circuit of transistors in the SPICE format into a hierarchical circuit of CMOS gates in the same format. This problem arises in the process of layout versus schematic (LVS) verification,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e783675cfcd3f4c02c74cac201786168
https://doi.org/10.1134/s106373971903003x
https://doi.org/10.1134/s106373971903003x
Conference
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Autor:
Juan C. Rey
Publikováno v:
ISPD
In spite of "doomsday" expectations, Moore's Law is alive and well. Semiconductor manufacturing and design companies, as well as the Electronic Design Automation (EDA) industry have been pushing ahead to bring more functionality to satisfy more aggre
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::08887216cd4b820e0675aa52b2ed0783
https://doi.org/10.1145/3372780.3378168
https://doi.org/10.1145/3372780.3378168
Publikováno v:
2020 Fourth International Conference on Computing Methodologies and Communication (ICCMC).
Multipliers in a digital processor remains as a core of mathematical computing paradigm. In ancient times Vedic mathematicians developed basic multiplication algorithms. This study focuses on optimizing area and designing the multiplier in 45 nanomet
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fec98ba6f70cf573c663e825b5f4d796
https://doi.org/10.1109/iccmc48092.2020.iccmc-0004
https://doi.org/10.1109/iccmc48092.2020.iccmc-0004
Autor:
Guilherme S. Cardoso, Tiago R. Balen
Publikováno v:
Analog Integrated Circuits and Signal Processing. 93:455-466
This paper presents an investigation on two important issues related to the application of enclosed layout transistor (ELT) to the design of analog building blocks: the performance impacts, related to the geometrical asymmetry and capacitances of dra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3830f115606bfb6f0cd53275da1f79bf
https://doi.org/10.1007/s10470-017-1050-z
https://doi.org/10.1007/s10470-017-1050-z
Autor:
Trond Ytterdal, Carsten Wulff
Publikováno v:
IEEE Journal of Solid-State Circuits. 52:1915-1926
This paper presents a low-power 9-bit compiled successive-approximation register (SAR) analog-to-digital converter (ADC) for Bluetooth low energy receivers. The ADC is compiled from a SPICE netlist, a technology rule file, and an object definition fi
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e7185c5c30e7590c82381f77d943a740
https://doi.org/10.1109/jssc.2017.2685463
https://doi.org/10.1109/jssc.2017.2685463
Publikováno v:
Proceedings of the Institution of Mechanical Engineers, Part G: Journal of Aerospace Engineering. 233:4287-4301
Previous studies of satellite module component (equipment) layout optimization usually initialized a component assignment in the initialization stage, which kept constant in following optimization process. The invariable component assignment will res
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f443b5889bee8cf2ec980deae742ef6b
https://doi.org/10.1177/0954410017704220
https://doi.org/10.1177/0954410017704220