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pro vyhledávání: '"Lavern S. Bete"'
Autor:
Lavern S. Bete, Jayson C. Loreto, Honey Mae N. Tagalogon, Olga Joy L. Gerasta, Sheerah Dale M. Orlasan
Publikováno v:
International Journal of Electronics and Electrical Engineering. :291-297
This paper presented its own design of 12-bit pipeline ADC which has an operating frequency of 8 MHz and consists of 4 stages only. This design is a pipelined ADC with four 3-bit stages (each stage resolves two bits).By doing so, the chip area can be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dd29cb58e9a0c18f3c490bf932f12434
https://doi.org/10.12720/ijeee.2.4.291-297
https://doi.org/10.12720/ijeee.2.4.291-297
