Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Laurent-Georges Gosset"'
Autor:
Alexis Farcy, J. Guillan, Laurent Favennec, K. Hamioud, Aziz Zenasni, T. Vanypre, Laurent-Georges Gosset, C. Guedj, Joaquim Torres, Thibaut David, M. Aimadeddine, Vincent Arnal, Nicolas Jourdan, M. Assous, Sylvain Maitrejean, Vincent Jousseaume, P. Chausse, L.L. Chapelon, Thierry Mourier
Publikováno v:
2007 IEEE International Interconnect Technology Conferencee.
Integrated circuits are more and more impacted by interconnect performance. As size reaches nanometric dimensions, changes in materials aim at performing a reliable and compliant technology with a maximum capability to reduce delay time and power con
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1b7cbe6bef633d03c6d1994b1b668809
https://doi.org/10.1109/iitc.2007.382330
https://doi.org/10.1109/iitc.2007.382330
Autor:
B. Blampey, Alexis Farcy, Bernard Flechet, M. Gallitre, Laurent-Georges Gosset, Cedric Bermond, Joaquim Torres
Publikováno v:
2006 International Interconnect Technology Conference.
The development of 32 nm node ICs face several integration and performance issues. Air gap architecture constitutes a potential alternative to porous materials. The most promising stacks are compared in terms of signal propagation thanks to electroma
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5be00466bccb752e2e36ec9bfe04876a
https://doi.org/10.1109/iitc.2006.1648667
https://doi.org/10.1109/iitc.2006.1648667
Autor:
Laurent-Georges Gosset, Sonarith Chhun, W Besling, Cedric Bermond, Thierry Lacrevaz, Vincent Arnal, F. de Crecy, O. Cueto, Alexis Farcy, G. Angenieux, O. Rousire, Joaquim Torres, B. Blampey, Bernard Flechet
Publikováno v:
Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..
Due to the continuous shrink of technology dimensions, parasitic propagation delay time and crosstalk at interconnect levels increasingly affect overall circuit performances. New materials, processes and architectures are now required to improve BEOL
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::15088eba86e463335fa61a0f4c0b9f43
https://doi.org/10.1109/iitc.2005.1499929
https://doi.org/10.1109/iitc.2005.1499929
Autor:
J. Michelon, Romano Hoofman, Vincent Arnal, O. Hinsinger, Aurelie Humbert, J.F. Guillaumond, Laurent-Georges Gosset, C. Guedj, L. Michaelson, Cindy K. Goldberg, Gérard Passemard, Greja Johanna Adriana Maria Verheijden, Joaquim Torres, W Besling, Dirk J. Gravesteijn, Pascal Bancken, Lucile Arnaud, Roel Daamen, Vincent Jousseaume, Robert Fox
Publikováno v:
Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..
The continuous downscaling of interconnect dimensions in combination with the introduction of porous low-k materials has increased the number of integration challenges tremendously. The paper focuses mainly on the impact of porous low-k dielectrics o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a009df83f9b2867efbba7086d32041e
https://doi.org/10.1109/iitc.2005.1499934
https://doi.org/10.1109/iitc.2005.1499934
Autor:
Marc Juhel, P. Dumont-Girard, Sonarith Chhun, G. Bryce, Laurent-Georges Gosset, Joaquim Torres, C. Prindle, V. Girault
Publikováno v:
Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..
The paper deals with the introduction of an innovative self-aligned capping layer leading to the formation of a Cu/Si/N mixed interface. The process was first developed targeting the aggressive 65 nm technology node and below. After optimisation, the
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ebf35f1e55d72a21669245402e37da26
https://doi.org/10.1109/iitc.2005.1499953
https://doi.org/10.1109/iitc.2005.1499953
Autor:
Thierry Mourier, W Besling, Gérard Passemard, M. Cordeau, Laurent-Georges Gosset, Sylvain Maitrejean, Joaquim Torres, P.H. Haumesser
Publikováno v:
Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).
As ultra-large scale integration progresses, efficient copper metallization of the narrow geometries becomes challenging. In this article, the various critical steps of the damascene metallization scheme are identified. Barrier deposition, copper see
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7a3e87db4e755d43e03597ff5c14ca84
https://doi.org/10.1109/iitc.2004.1345663
https://doi.org/10.1109/iitc.2004.1345663