Zobrazeno 1 - 8
of 8
pro vyhledávání: '"Larry R. Hite"'
Publikováno v:
IEEE Transactions on Nuclear Science. 39:2121-2125
A novel SEU (single event upset) resistant SRAM (static random access memory) cell has been implemented in a 256 K SOI (silicon on insulator) SRAM that has attractive performance characteristics over the military temperature range of -55 to +125 degr
Autor:
C.C. Shen, Larry R. Hite, Gordon P. Pollack, E. Yee, Jeong-Mo Hwang, R. Rajgopal, H. Lu, L. Cohn, Theodore W. Houston
Publikováno v:
Workshop Record. 1994 IEEE Radiation Effects Data Workshop.
SOI technology and design combine to give a high performance radiation hardened 1M SRAM manufacturable at the 0.8 /spl mu/m technology node. Features include a nominal 23 ns access time and a worst case minimum Write pulse of less than 15 ns, along w
Autor:
A. Peterson, Gordon P. Pollack, W.E. Bailey, T.G.W. Blake, Larry R. Hite, M. Matloubiam, J. Liu, R. Sundaresan, Theodore W. Houston, P. Mei, H. Lu
Publikováno v:
IEEE SOS/SOI Technology Conference.
Summary form only given. The successful design and fabrication of a 64 K SRAM on SIMOX material is discussed. The advantage of the small junction area resulting from mesa isolation is most evident in the very low standby current. An impressively high
Autor:
Larry R. Hite, C.C. Shen, H. Lu, Gordon P. Pollack, E. Yee, R. Rajgopal, Theodore W. Houston, Yea-Dean Sheu, Jeong-Mo Hwang
Publikováno v:
Proceedings of 1993 IEEE International SOI Conference.
A 1-M bit SRAM with 0.8 um feature sizes has been successfully fabricated using SIMOX material. The advantages of SOI for low capacitance, latch-up immunity, and reduced collection charge for single events have been long recognized. The demonstration
Autor:
Thomas E. Tang, Thomas C. Holloway, T.G.W. Blake, Larry R. Hite, Roger A. Haken, Che-Chia Wei
Publikováno v:
IEEE Transactions on Electron Devices. 34:682-688
This paper reports on how the self-aligned titanium disilicide process, normally used to simultaneously reduce MOS gate and junction sheet resistances to less than 1 Ω/square, has been extended to provide a layer of local interconnect for VLSI CMOS
Autor:
H.W. Lam, C.-E. Chen, R.K. Hester, R. Sundaresan, B.-Y. Mao, Larry R. Hite, T.G.W. Blake, C. Slawinski, Mishel Matloubian
Publikováno v:
IEEE Transactions on Electron Devices. 33:1840-1841
Autor:
H.E. Davis, Ashwin H. Shah, Roger A. Haken, Larry R. Hite, Pallab K. Chatterjee, C.D. Gosmeyer, Satwinder Malhi, R. Sundaresan, C.-E. Chen, S.S. Mahant-Shetti, R.V. Karnaugh, H.W. Lam, R.K. Hester, R.F. Pinizzotto
Publikováno v:
IEEE Transactions on Electron Devices. 31:1981-1981
Akademický článek
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