Zobrazeno 1 - 7
of 7
pro vyhledávání: '"Lai Chiu-Chung"'
Publikováno v:
MATEC Web of Conferences, Vol 201, p 05001 (2018)
In VDMOS device the anti-JFET concentration has important role for determining the breakdown voltage and on-resistance of the device. Because higher N-drift doping concentration can provide the very best on-resistance of the device but also decrease
Externí odkaz:
https://doaj.org/article/0b132bc19b9e4510b025881be7aad1ef
Autor:
Deivasigamani Ravi, Sheu Gene, Aanand, Wei Lu Shao, Sarwar Imam Syed, Lai Chiu-Chung, Yang Shao-Ming
Publikováno v:
MATEC Web of Conferences, Vol 201, p 02001 (2018)
In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons,
Externí odkaz:
https://doaj.org/article/5a6ebd875f8c431491b2ba8eb81a1907
Autor:
Wei Lu Shao, Lai Chiu-Chung, Yang Shaoming, Aanand, Sheu Gene, Sarwar Imam Syed, Deivasigamani Ravi
Publikováno v:
MATEC Web of Conferences, Vol 201, p 02001 (2018)
In this paper, we demonstrate electrical degradation due to hot carrier injection (HCI) stress for PLDMOS device. The lower gate current and the IDsat degradation at low gate voltage (VGS) and high drain voltage (VDS) is investigated. Hot Electrons,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b1cb53f4901e86e52a377d0d95dac9e8
https://doi.org/10.1051/matecconf/201820102001
https://doi.org/10.1051/matecconf/201820102001
Autor:
Wang, Cheng-Chi, Yangi, Shao Ming, Sheu, Gene, Chien, Ting Yao, Wu, Chieh Chih, Lee, Tzu Chieh, Wu, Ching Yuan, Lai, Chiu Chung
Publikováno v:
MATEC Web of Conferences; 8/21/2018, Vol. 201, pN.PAG-N.PAG, 4p
Publikováno v:
MATEC Web of Conferences; 8/21/2018, Vol. 201, pN.PAG-N.PAG, 3p
Autor:
Wang, Cheng-Chi, Deivasigamani, Ravi, Sheu, Gene, Aanand, Wei Lu, Shao, Sarwar Imam, Syed, Lai, Chiu-Chung, Yang, Shao-Ming
Publikováno v:
MATEC Web of Conferences; 8/21/2018, Vol. 201, pN.PAG-N.PAG, 3p
Autor:
Yangi Shao Ming, Sheu Gene, Chien Ting Yao, Wu Chieh Chih, Lee Tzu Chieh, Wu Ching Yuan, Lai Chiu Chung
Publikováno v:
MATEC Web of Conferences, Vol 201, p 02003 (2018)
We used TCAD Synopsys 3D tools and device simulators to propose an innovative device structure of 80V-100V high-side NLDMOS by using the silicon to silicon-di-oxide ratio with side trench. The high-side can also be developed by placing an NBL structu
Externí odkaz:
https://doaj.org/article/9f6eab17689247679ed763d3dc034d34