Zobrazeno 1 - 10
of 15
pro vyhledávání: '"Lai Chin Yung"'
Publikováno v:
PLoS ONE, Vol 9, Iss 5, p e97484 (2014)
The success of printing technology in the electronics industry primarily depends on the availability of metal printing ink. Various types of commercially available metal ink are widely used in different industries such as the solar cell, radio freque
Externí odkaz:
https://doaj.org/article/16c3c18b9cbd47a4be562340730ba2f2
Autor:
Lai Chin Yung
Publikováno v:
2018 IEEE 20th Electronics Packaging Technology Conference (EPTC).
Flip chip packaging has gained more acceptance; becoming well known in semiconductor packaging industries, mainly due to the increasing demand in the market for small size packages. The application of copper pillar joint in flip chip packaging has co
Publikováno v:
2018 IEEE 38th International Electronics Manufacturing Technology Conference (IEMT).
In recent years, flip chip packaging by application of a copper pillar bump as an interconnector within the packages has successfully shrunk the package size to a minimum level, by maintaining or maximizing the chip application functionality. Neverth
Publikováno v:
2017 IEEE Regional Symposium on Micro and Nanoelectronics (RSM).
NSOP defect is a common defect faced by IC packaging assembly house. The failure modes normally happen when the wire bond process is not able to bond the wire ball head on the silicon chip bond pad surface. In this analysis, the localized NSOP defect
Autor:
Lai Chin Yung, Cheong Choke Fei
Publikováno v:
2016 IEEE 37th International Electronics Manufacturing Technology (IEMT) & 18th Electronics Materials and Packaging (EMAP) Conference.
In copper leadframe fabrication process, anti-oxidant agent is a common chemical solution used to easily protect oxidize surface like copper bond pad surface. There are varieties of anti-oxidant solution available in the market. However, only certain
Autor:
Lai Chin Yung, Ronizan bin Mohd Salleh
Publikováno v:
2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC).
Formation of voids at the interface between Cu/Cu3Sn or within Cu3Sn phase can be observed when Sn plated on electrolytic copper surface is subjected to High Temperature Storage of 150°C for 1000 hours. In this study, acid copper plating system cons
Autor:
Cheong Choke Fei, Lai Chin Yung
Publikováno v:
2015 IEEE Regional Symposium on Micro and Nanoelectronics (RSM).
Leadframe fabrication process normally involves additional thin film metal layer plating on the bulk copper substrate surface for wire bond purpose. The recent commonly adopted plating materials are silver, tin, and copper flake. To assess the thickn
Publikováno v:
RSM 2013 IEEE Regional Symposium on Micro and Nanoelectronics.
In current backend assembly house, there is yet standard inspection method available to confirm the incoming bond pad quality. The different severity oxidation level of the bond pad may highly influence the wire bonding process integrity. Due to this
Publikováno v:
2012 10th IEEE International Conference on Semiconductor Electronics (ICSE).
Based on several studies, package delamination caused by copper oxide is one of the most common IC packaging defects detected in backend assembly processes. The possible root causes for the copper oxide formation could be due to leadframe surface oxi
Autor:
Lai Chin Yung, Chew Tat Tian
Publikováno v:
2008 IEEE International Conference on Semiconductor Electronics.
Electrical overstress has historically been one of the leading failure damage of integrated circuit. The result of an EOS event can range from soft damage with degradation to the IC up to catastrophic failure where the IC is permanently non-functiona