Zobrazeno 1 - 10
of 68
pro vyhledávání: '"L.G. Gosset"'
Autor:
J. Guillan, Joaquim Torres, V. Girault, R. Gras, M. Hauschildt, E. Petitprez, P. Brun, M. Gall, E. Ollier, R. Delsol, L.G. Gosset
Publikováno v:
Microelectronic Engineering. 84:2629-2633
Integration of CoWP self-aligned barriers in hybrid stack with SiCN liner in a standard 65nm technology node integration scheme faces several issues. For example, bowing of upper metal level occurs due to the interaction between CoWP and etch plasma
Autor:
J. Guillan, Didier Louis, N. Lopez, D. Rébiscoul, A. Roman, L.G. Gosset, R. Kachtouli, Lucile Broussous, G. Passemard
Publikováno v:
Solid State Phenomena. 134:321-324
Autor:
J.C. Dupuy, G. Bryce, Nicolas Gaillard, S. Chhun, J. Vitiello, V. Girault, M. Hopstaken, J. Guillan, Joaquim Torres, L.G. Gosset, B. Van Schravendijk, J. Michelon, Pascal Bancken, S. Courtas, R. Gras, Marc Juhel, L. Pinzelli, C. Debauche
Publikováno v:
Microelectronic Engineering. 83:2094-2100
Self-aligned barriers are widely investigated either in replacement of dielectric liners to decrease the total interconnect k value or as a treatment prior standard dielectric barrier deposition to improve reliability performances. In this paper, a t
Autor:
Magali Gregoire, D. Delille, D. Ney, C. Trouiller, Brice Gautier, J.C. Dupuy, P. Chausse, M. Hopstaken, L.G. Gosset, N. Casanova, Joaquim Torres, S. Chhun
Publikováno v:
Microelectronic Engineering. 82:587-593
Self-aligned barriers have been widely investigated in the replacement of standard PECVD dielectric liners to decrease coupling capacitance. As an alternative to CVD or electroless approaches, a two step process based on the modification of the Cu su
Autor:
Alexis Farcy, D. Bouchu, F. Gaillard, Romano Hoofman, L.G. Gosset, Joaquim Torres, Pascal Bancken, V. Nguyen Hoang, Greja Johanna Adriana Maria Verheijden, J. Michelon, T. Vandeweyer, Ph. Lyan, Roel Daamen, J. de Pontcharra, Vincent Arnal
Publikováno v:
Microelectronic Engineering. 82:321-332
The integration of air gaps for advanced Cu interconnects is mandatory to achieve the performances required for high performance integrated circuits (ICs). The interest of their introduction as a function of the chosen architecture, i.e. hybrid (i.e.
Publikováno v:
Microelectronic Engineering. 76:1-7
Device performance for 65 nm node CMOS technology and beyond will require the integration of porous ultra-low-k materials with dielectric constant below 2.5, in order to reduce coupling effects between interconnect lines. This paper discusses the pro
Autor:
J.F. Guillaumond, Lucile Arnaud, Vincent Arnal, Roland Pantel, Joaquim Torres, P. Dumont-Girard, S. Chhun, L.G. Gosset, N. Casanova, X. Federspiel
Publikováno v:
Microelectronic Engineering. 76:106-112
Self-aligned barriers on copper are widely investigated as a promising solution to replace standard PECVD dielectric barriers for the 65 nm technology node and beyond. As an alternative to electroless or selective CVD deposition, CuSiN barriers, base
Autor:
Maurice Rivoire, C. Monget, L.G. Gosset, N. Casanova, J. C. Oberlin, M. Broekaart, P. Brun, Joaquim Torres, Vincent Arnal
Publikováno v:
Microelectronic Engineering. 70:274-279
The formation of air gaps by means of a non-conformal chemical vapor deposition (CVD) on patterned wafers was successfully demonstrated using SiOC (K=2.9) as inter-level metal dielectric. This paper presents the results on physical characterization a
Publikováno v:
Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms. :545-550
The relative positions, intensity and shape of narrow resonances (F ≈ 100 eV) in (p,γ), (p,αγ) and (p,p′γ) reactions induced on the isotopes 13C, 15N, 18O, 19F, 23Na, 24Mg, 27Al, 29Si, 30Si and 52Cr were investigated in the energy range from