Zobrazeno 1 - 10
of 187
pro vyhledávání: '"L. Rigazio"'
Akademický článek
Tento výsledek nelze pro nepřihlášené uživatele zobrazit.
K zobrazení výsledku je třeba se přihlásit.
K zobrazení výsledku je třeba se přihlásit.
The modeling of the core power-delivery network of digital integrated circuits (ICs) is addressed by a black-box approach, leading to an n-port equivalent of the IC. The model parameters are estimated from external measurements carried out at the IC
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::6658829a8810c00802d5748e9fd0a9b4
http://hdl.handle.net/11583/2373679
http://hdl.handle.net/11583/2373679
Autor:
Igor Simone Stievano, Flavio Canavero, Jose C. Pedro, F. Vitale, L. Rigazio, Telmo R. Cunha, A. Girardi, Hugo M. Teixeira, R. Izzi
This paper addresses the generation of behavioral models of digital integrated circuits (ICs) for signal and power integrity simulations. The proposed models are obtained by external measurements carried out at the device ports only and by the combin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::045e8b59dc116c04445a5f03314a8e18
http://hdl.handle.net/11583/2373678
http://hdl.handle.net/11583/2373678
Publikováno v:
2009 IEEE 18th Conference on Electrical Performance of Electronic Packaging and Systems.
This paper addresses the generation of behavioral models of digital ICs for signal and power integrity simulations. The proposed models are obtained by external port measurements and by the combined application of specialized state-of-the-art modelin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::10d4c0f4695fe5608aa05efd3219202f
https://doi.org/10.1109/epeps.2009.5338470
https://doi.org/10.1109/epeps.2009.5338470
Autor:
Igor Simone Stievano, T. Lessio, A. Conci, Hugo M. Teixeira, I.A. Maio, R. Izzi, Jose C. Pedro, L. Rigazio, Telmo R. Cunha, A. Girardi, Flavio Canavero
Publikováno v:
2009 IEEE Workshop on Signal Propagation on Interconnects.
This paper focuses on the power delivery characterization of high-speed IC memories by means of on-chip measurements. A systematic analysis of the measurement setup, of the effects of chip biasing and of the use of the measured responses to develop m
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::a2d1cb70dd213e6b1b232ebb2cb3c057
https://doi.org/10.1109/spi.2009.5089835
https://doi.org/10.1109/spi.2009.5089835
Publikováno v:
ICASSP (1)
Our previous study on maximum relative margin estimation (MRME) of HMM (C. Liu et al., 2005) demonstrated its advantage over the standard minimum classification error (MCE) training. In this paper, we report our recent improvement on MRME. Specifical
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::468847ac4a9efb2b151d48c85e1447f8
https://doi.org/10.1109/icassp.2006.1660009
https://doi.org/10.1109/icassp.2006.1660009
Publikováno v:
IEEE Workshop on Automatic Speech Recognition and Understanding, 2005..
Based on the principle of large margin classifier, recently we proposed two novel training methods, namely large margin estimation (LME) [8] and maximum relative margin estimation (MRME) [9] for speech recognition. In LME or MRME, HMM parameters are
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1adfba86b1cd05d43bb5fcaeec942a5
https://doi.org/10.1109/asru.2005.1566540
https://doi.org/10.1109/asru.2005.1566540
Publikováno v:
ICASSP
The "eigenvoice" technique achieves rapid speaker adaptation by employing prior knowledge of speaker space obtained from reference speakers to place strong constraints on the initial model for each new speaker. It has previously been shown to yield v
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d54b946127ac176bb3de4ae2d47f0847
https://doi.org/10.1109/icassp.2001.940845
https://doi.org/10.1109/icassp.2001.940845
The paper describes the implementation of a massively parallel cellular architecture specifically designed for a number of tasks related to the physical verification and synthesis of integrated circuits. The machine has been designed to operate as a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::f9cc9b6dd3c1117e6eb12e8f32dfef48
http://hdl.handle.net/11583/1676228
http://hdl.handle.net/11583/1676228
Autor:
Shibly, Kabid Hassan1 (AUTHOR) shibly.kabid_hassan.sl1@is.naist.jp, Hossain, Md Delwar1 (AUTHOR), Inoue, Hiroyuki2 (AUTHOR), Taenaka, Yuzo1 (AUTHOR), Kadobayashi, Youki1 (AUTHOR)
Publikováno v:
Applied Artificial Intelligence. 2023, Vol. 37 Issue 1, p1-31. 31p.