Zobrazeno 1 - 10
of 27
pro vyhledávání: '"L. Pescini"'
Autor:
E.-O. Andersen, K. van der Zanden, Y. Gong, L. Pescini, R. Allinger, R. Kakoschke, J.R. Power
Publikováno v:
Solid-State Electronics. 52:550-556
We have successfully integrated 2 Mb arrays with SiO2/Al2O3 stacks as inter-poly dielectric (IPD) fabricated in a proven 130 nm embedded Flash technology. Gate stack write/erase high voltages (HV) can be reduced by 3 V. Write/erase distributions show
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8e3cef8df3246f0d6b365ce58432a9bc
https://doi.org/10.1016/j.sse.2008.01.003
https://doi.org/10.1016/j.sse.2008.01.003
Autor:
M. Bauer, Danny Pak-Chum Shum, Martin Stiftinger, Kyung Joon Han, Armin Tilke, Volker Hecht, N. Chan, L. Pescini, R. Kakoschke, Sung-Rae Kim
Publikováno v:
IEEE Transactions on Electron Devices. 54:1681-1688
In this paper, we embedded a Flash memory cell with 90-nm ground-rules in a high-performance CMOS logic process. A novel deep trench isolation (DTI) module enables an isolated p-well (IPW) bias scheme, leading to Flash with uniform channel program/er
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d5558e9c5c7e6624d3698c9a3bfb322c
https://doi.org/10.1109/ted.2007.898040
https://doi.org/10.1109/ted.2007.898040
Publikováno v:
Quantum Information Processing. :338-352
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4b5e6caf45e1dad26830e3de7c5ca99d
https://doi.org/10.1002/3527606009.ch26
https://doi.org/10.1002/3527606009.ch26
Autor:
K. van der Zanden, E.-O. Andersen, D. Shum, G. Tempel, W. Langheinrich, R. Allinger, R. Kakoschke, L. Pescini, Robert Strenz, J.R. Power, Y. Gong
Publikováno v:
2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop.
We report Flash cell write/erase and reliability data from a 2Mb demonstrator processed using a 0.13 mum based eFlash technology comprising the high-k material, aluminum oxide (Al2O3) within the inter-poly dielectric (IPD) layer. With bottom and top-
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::55119629c3cfa088996776219afad3cd
https://doi.org/10.1109/nvsmw.2007.4290567
https://doi.org/10.1109/nvsmw.2007.4290567
Autor:
L. Pescini, B. Cronquist, Danny Pak-Chum Shum, Sung-Rae Kim, Martin Stiftinger, N. Chan, Ben Leung, Volker Hecht, Armin Tilke, R. Kakoschke, Kyung Joon Han
Publikováno v:
CICC
A highly scalable flash-based Field Programmable Gate Array (FPGA) technology has been achieved with Deep Trench Isolation (DTI). The DTI allows for a reduced cell size and enables Independent Pwell (IPW) operation. The IPW allows the Fowler-Nordheim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e2e56ae493a79b33e799a1c967d70d05
https://doi.org/10.1109/cicc.2007.4405688
https://doi.org/10.1109/cicc.2007.4405688
Autor:
R. Kakoschke, Armin Tilke, Martin Stiftinger, Kyung Joon Han, Sung-Rae Kim, N. Chan, L. Pescini, Danny Pak-Chum Shum
Publikováno v:
2006 21st IEEE Non-Volatile Semiconductor Memory Workshop.
In this work, we present a novel buried BL (BBL) concept that links the source contacts of each individual BL via the isolated p-well; thus effectively eliminating one metal line per BL and reducing overall cell size. In comparison to the UCPE cell,
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::de9757cf3e258fb0fc3ad16f55f6eb64
https://doi.org/10.1109/.2006.1629478
https://doi.org/10.1109/.2006.1629478
Autor:
Danny Pak-Chum Shum, Kyung Joon Han, R. Broze, Volker Hecht, A. Yang, R. Kakoschke, N. Chan, L. Pescini, Armin Tilke, Sung-Rae Kim, Martin Stiftinger
Publikováno v:
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..
A flash memory cell with 90nm ground-rules has been embedded in a high performance (HP) CMOS logic process. A deep trench isolation (DTi) process module enables an isolated Pwell (IPW) bias scheme for the first time, leading to flash write/erase (W/E
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bb0ed9b946fe5d161891b1324ce5492c
https://doi.org/10.1109/iedm.2005.1609346
https://doi.org/10.1109/iedm.2005.1609346
Publikováno v:
2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.
A flash memory cell with 90nm ground-rules has been embedded in a high performance (HP) CMOS logic process. A novel deep trench isolation (DTi) process module enables an isolated pwell (IPW) bias scheme, leading to flash with uniform channel program/
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1d1e6a5ee5c7286686b3a0fec244ce5b
https://doi.org/10.1109/icsict.2006.306441
https://doi.org/10.1109/icsict.2006.306441
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Akademický článek
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