Zobrazeno 1 - 10
of 80
pro vyhledávání: '"L. Economikos"'
Autor:
E. Engbrecht, Edward P. Maciejewski, Christopher D. Sheraw, R. Divakaruni, Zhengwen Li, Allen H. Gabor, L. Economikos, Fernando Guarin, N. Zhan, H-K Lee, MaryJane Brodsky, Kenneth J. Stein, Siyuranga O. Koswatta, Y. Yang, Byeong Y. Kim, J. Hong, A. Bryant, Herbert L. Ho, Ruqiang Bao, Nicolas Breil, Babar A. Khan, E. Woodard, W-H. Lee, C-H. Lin, A. Levesque, Kevin McStay, V. Basker, Viraj Y. Sardesai, C. Tran, A. Ogino, Reinaldo A. Vega, C. DeWan, Shreesh Narasimha, J-J. An, Amit Kumar, A. Aiyar, Ravikumar Ramachandran, W. Wang, X. Wang, W. Nicoll, D. Hoyos, A. Friedman, Barry Linder, Yongan Xu, E. Alptekin, Cathryn Christiansen, S. Polvino, Han Wang, Scott R. Stiffler, G. Northrop, S. Saudari, J. Rice, Saraf Iqbal Rashid, Sunfei Fang, Michael V. Aquilino, Z. Ren, B. Kannan, Geng Wang, Noah Zamdmer, T. Kwon, Paul D. Agnello, Hasan M. Nayfeh, S. Jain, Robert R. Robison, M. Hasanuzzaman, J. Cai, L. Lanzerotti, D. Wehelle-Gamage, Basanth Jagannathan, J. Johnson, E. Kaste, Kai Zhao, Huiling Shang, Carl J. Radens, Shariq Siddiqui, Y. Ke, D. Ferrer, Ximeng Guan, D. Conklin, K. Boyd, K. Henson, Siddarth A. Krishnan, Bernard A. Engel, H. Dong, S. Mahajan, Unoh Kwon, Dominic J. Schepis, William Y. Chang, Liyang Song, Brian J. Greene, Chengwen Pei, S.-J. Jeng, Clevenger Leigh Anne H, Vijay Narayanan, C. Zhu, Wai-kin Li, Henry K. Utomo, Wei Liu, Dureseti Chidambarrao
Publikováno v:
2014 IEEE International Electron Devices Meeting.
We present a fully integrated 14nm CMOS technology featuring finFET architecture on an SOI substrate for a diverse set of SoC applications including HP server microprocessors and LP ASICs. This SOI finFET architecture is integrated with a 4th generat
Autor:
R. Sherif, L. Economikos
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part A. 19:234-239
This study is concerned with the design of a laser bond tool operating at a laser power of less than 8 W, having a life of more than 25000 bonds and meeting the laser safety requirements of the manufacturing environment. The finite-element method (FE
Autor:
L. Economikos, Thomas A. Wassick
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. 18:154-162
IBM has developed various technologies for repairing defects in thin film circuitry, primarily for Multichip Module (MCM) applications. This paper discusses five technologies: laser chemical vapor deposition (LCVD), wire bond, laser-sonic bonding, so
Autor:
M.E. Scaman, L. Economikos
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. 18:675-684
Computer vision techniques have been developed and implemented in a high volume manufacturing environment for automatic optical inspection (AOI) of multichip modules with thin films (MCM-D). Inspection-of complex thin film metal patterns for critical
Autor:
Eduard A. Cartier, X. Chen, Pierre Malinge, L. Kang, T. Watanabe, Michael P. Belyansky, L. Economikos, O. Menut, Vijay Narayanan, C. Reddy, R. Divakaruni, Y.H. Park, Ravi Prakash Srivastava, M. Pallachalil, R. Koshy, Dominic J. Schepis, P. Montanini, Keith Kwong Hon Wong, M. Eller, Park Sejun, A. Ogino, H. Mallela, U. Kwon, T. Shimizu, W. Cote, Jay W. Strane, Srikanth Samavedam, M. Chae, Anurag Mittal, R. Sampson, J. Meiring, R. Joy, Huiling Shang, S. Soss, X. Yang, Keith H. Tabakman, M. Oh, W. Lai, C. Tran, S. Jain, E. Josse, D. Codi, H.V. Meer, B.Y. Kim, Jung-Geun Kim, Jin Bum Kim, C. Goldberg, Henry K. Utomo, J. Ciavatti, Barry Linder, R. Vega, W. Neumueller, J. Muncy, Kyung-hwan Cho, Scott J. Bukofsky, Alvin G. Thomas, Dinesh Koli, Katherina Babich, Bomi Kim, S. Lian, E. Alptekin, Y. Liu, S. H. Rhee, X. Wu, R. Arndt, W.L. Tan, Frederic Lalanne, Nam-Sung Kim, Ravikumar Ramachandran, K.Y. Lee, M.H. Nam, Randy W. Mann, Il-Ryong Kim, Yujun Li, V. Sardesai, Siddarth A. Krishnan, C. Tian, D. Levedakis, Seung-Kwon Kim, Jedon Kim, M. Celik, F. Matsuoka, M. Weybright, J. Sudijono, M. Aminpur, B. Hamieh, Greg Northrop, J.W. Lee
Publikováno v:
2012 Symposium on VLSI Technology (VLSIT).
In this paper, we present a high performance planar 20nm CMOS bulk technology for low power mobile (LPM) computing applications featuring an advanced high-k metal gate (HKMG) process, strain engineering, 64nm metal pitch & ULK dielectrics. Compared w
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. 17:291-299
Computer vision techniques have been developed and implemented for automatic optical inspection (AOI) of multichip modules with thin films. A case study, detailing the application of the techniques based on an Orbot TF501 visual inspection system pla
Publikováno v:
IEEE Transactions on Components, Packaging, and Manufacturing Technology: Part B. 17:56-61
For complex substrates, electrical test is a fundamental element of cost control and quality assurance. Test technologies for multi-chip substrate applications must handle densely wired products with small, tightly spaced contact features. Detection
Autor:
Eva E. Simonyi, William F. Landers, T. H. Ivers, Thomas M. Shaw, K. Ida, D. Jung, Sujatha Sankaran, Kaushal Patel, Johnny Widodo, Naftali E. Lustig, M. Chae, Kaushik Chanda, G. A. Biery, Wan-jae Park, J. Sucharitaves, W. Liu, T. Ko, Christos D. Dimitrakopoulos, M. Kelling, Stephen M. Gates, R. G. Filippi, D. Nielsen, John A. Fitzsimmons, O. Bravo, M. Beck, Satya V. Nitta, Terry A. Spooner, L. Economikos, T. Bolom, Alfred Grill, John G. Pellerin, X. Liu, Eric G. Liniger, G. Matusiewicz, E. Kaltalioglu, C. Tian, Mukta G. Farooq, F. Chen, David L. Rath, Griselda Bonilla, D. Nguyen, Nicholas C. M. Fuller, P. Davis, S. Arai, Daniel C. Edelstein, J.P. Doyle, Kevin S. Petrarca, P. Ong, Kaushik A. Kumar, H. Wendt, L. Wiggins, V. Patel, Stephan Grunow, W. Li, L. Nicholson, I. Melville, Sanjay Mehta, Stephen E. Greco, J. Werking, Robert L. Wisnieff, B. Moon, Darryl D. Restaino, S. Marokkey, R. Hannon, Myoung-Bum Lee, Theodorus E. Standaert, Shom Ponoth, Paul S. McLaughlin, R. Augur, P. V. McLaughlin, C. Labelle, A. Cowley, H. Shoba, S. Rhee, K. Malone, Stephan A. Cohen, Michael Lane, E.T. Ryan, H. Landis, Larry Clevenger, James R. Lloyd, James J. Demarest, Andrew H. Simon, K. Miyata
Publikováno v:
2006 International Electron Devices Meeting.
A high performance 45nm BEOL technology with proven reliability is presented. This BEOL has a hierarchical architecture with up to 10 wiring levels with 5 in PECVD SiCOH (k=3.0), and 3 in a newly-developed advanced PECVD ultralow-k (ULK) porous SiCOH
Publikováno v:
Proceedings of the International Conference on Multichip Modules.
As metal interconnections in multichip modules (MCM) are getting narrower and thinner, latent open defects such as notches, nicks, weak connections, etc., will have a greater chance to occur under normal manufacturing processes. We have applied a pha
Publikováno v:
Proceedings of the International Conference on Multichip Modules.