A Novel Structure for Backside Protection Against Physical Attacks on Secure Chips or SiP

Autor: Jessy Clédière, Gilles Simon, Edouard Deschaseaux, L. Duperrex, Jean Charbonnier, Jean-Charles Souriau, A. Merle, Stephan Borel, Romain Wacquez, Jacques Fournier

Publikováno v: 2018 IEEE 68th Electronic Components and Technology Conference (ECTC)
2018 IEEE 68th Electronic Components and Technology Conference (ECTC), May 2018, San Diego, United States. pp.515-520, ⟨10.1109/ECTC.2018.00081⟩

International audience; A structure intended to protect Integrated Circuits (IC) against physical attacks is presented. Located on the backside of a chip, it complements the countermeasures usually available on the front side of secure components. It

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::09a5361672380fd802ea5d4f81fd17e0
https://hal-cea.archives-ouvertes.fr/cea-02185285/document

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