Zobrazeno 1 - 10
of 12
pro vyhledávání: '"L. Dorrer"'
Publikováno v:
Hybrid ADCs, Smart Sensors for the IoT, and Sub-1V & Advanced Node Analog Circuit Design ISBN: 9783319612843
Intel Tri-Gate transistors (FinFET) further shrink MOSFET technologies and have been a disruptive semiconductor innovation offering lower area, lower supply voltage, and lower power consumption. This paper presents and compares measurements and desig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3bf17f9a0075331d4c5c743b496f5133
https://doi.org/10.1007/978-3-319-61285-0_15
https://doi.org/10.1007/978-3-319-61285-0_15
Autor:
F. Conzatti, Claus Kropf, Norbert Schembera, Venerando Rallos, Patrick Torta, Jacinto San Pablo Garcia, L. Dorrer, Dirk Patzold
Publikováno v:
ESSCIRC
This work demonstrates a multi-Mode CT ΔΣ ADC in 14nm FinFET Intel Technology. The proposed converter makes use of a novel 5-bit partial DEM technique at 1.25GHz that, in conjunction with an offset current dumping solution, drastically reduces curr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ca3704f66328e76356ffee7f044ca803
https://doi.org/10.1109/esscirc.2017.8094545
https://doi.org/10.1109/esscirc.2017.8094545
Publikováno v:
Wideband Continuous-time ΣΔ ADCs, Automotive Electronics, and Power Management ISBN: 9783319416694
This paper presents three different WiFi receiver chain lineups using a high dynamic range continuous time Sigma Delta A/D converter (SD-ADC). The chains tradeoffs are analyzed from the perspective of the ADC design. The key performance indexes are p
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cc6e1864e3788f8480deddbbb3689273
https://doi.org/10.1007/978-3-319-41670-0_1
https://doi.org/10.1007/978-3-319-41670-0_1
Publikováno v:
IEEE Journal of Solid-State Circuits. 40:2416-2427
A third-order continuous-time multibit (4 bit) /spl Delta//spl Sigma/ ADC for wireless applications is implemented in a 0.13-/spl mu/m CMOS process. It is shown that the power consumption can be considerably reduced by using a tracking ADC composed o
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d6994e0ee66f23b32abeedecf76419a5
https://doi.org/10.1109/jssc.2005.856282
https://doi.org/10.1109/jssc.2005.856282
Publikováno v:
2006 Proceedings of the 32nd European Solid-State Circuits Conference.
A second order continuous time multibit (4bit) DeltaSigma-ADC for voice coding is implemented in a 65nm CMOS process. The dynamic range (DR) is 95dB over the voice bandwidth of 20-20 000Hz. Furthermore, by using a feed back architecture the need of a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dbb172b2ae7009209bcb68a3b94666be
https://doi.org/10.1109/esscir.2006.307564
https://doi.org/10.1109/esscir.2006.307564
Publikováno v:
Proceedings of the 30th European Solid-State Circuits Conference.
A continuous-time 4th-order multi-bit /spl Sigma//spl Delta/-modulator for GSM/EDGE is presented. By introduction of a direct feed-forward path from the input to the quantiser, high immunity to adjacent channel interferers is achieved. The dynamic ra
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b380523ea8fbf4cf48e5af47c2027465
https://doi.org/10.1109/esscir.2004.1356648
https://doi.org/10.1109/esscir.2004.1356648
Publikováno v:
ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).
A 10-bit resolution continuous-time multi-bit /spl Sigma//spl Delta/ ADC for UMTS is introduced. A power-efficient implementation of a third-order multi-bit modulator is presented. By using a feedforward architecture and quantizer dynamic element mat
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5407c21b03999c1c7fe7656807e4678c
https://doi.org/10.1109/esscirc.2003.1257118
https://doi.org/10.1109/esscirc.2003.1257118
Autor:
L. Dorrer, Thomas Pötscher, Luis Hernandez, A. Di Giandomenico, Susana Paton, Andreas Wiesbauer
Publikováno v:
ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).
A wide bandwidth continuous time sigma-delta ADC implemented in a 0.13 /spl mu/m CMOS technology is introduced. Active blocks are composed of regular threshold voltage devices only. The circuit is targeted for wide-bandwidth applications such as vide
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::11b3ac5e0b7b82e91a73f0f809c31db7
https://doi.org/10.1109/esscirc.2003.1257115
https://doi.org/10.1109/esscirc.2003.1257115
Publikováno v:
ISCAS (1)
A 10bit-resolution continuous-time single-bit /spl Sigma//spl Delta/ ADC for UMTS is introduced. A power-efficient implementation of a 2/sup nd/-order single-bit modulator is presented: analog non-idealities are compensated at system level, in order
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::2e3509cdf1568feab2e40b1917e42a9c
https://doi.org/10.1109/iscas.2003.1205749
https://doi.org/10.1109/iscas.2003.1205749
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