Zobrazeno 1 - 10
of 655
pro vyhledávání: '"L. Dadda"'
Autor:
L. Dadda
Publikováno v:
IEEE Transactions on Computers. 56:1320-1328
Decimal arithmetic has been revived in recent years due to the large amount of data in commercial applications. We consider the problem of multioperand parallel decimal addition with an approach that uses binary arithmetic, suggested by the adoption
Autor:
L. Dadda, Vincenzo Piuri
Publikováno v:
IEEE Transactions on Computers. 45:348-356
A well-known scheme for obtaining high throughput adders is a pipeline in which each stage contains an array of half-adders performing a carry-save addition. This paper shows that other schemes can be designed, based on the idea of pipelining a seria
Autor:
H. Hentzell, G. M. Grieco, N. Yamdagni, M. Givoletti, P.W. Cattaneo, L. Dadda, P. Schwemling, R. Benetta, A. Odmark, P. Bailly, S. Mutz, Andras Kerek, Magnus Hansen, G. Appelquist, I. Hoglund, B. Lofstedt, G. Polesello, M. Lippi, S. Brigati, S. Gong, Franco Maloberti, S. Inkinen, H. Alexanian, F. Blouzon, J. David, Guido Torelli, Bengt Lund-Jensen, Luca Breveglieri, J.F. Genat, M. Engstrom, Christer Svensson, Vincenzo Piuri, Christian Bohm, J.P. Vanuxem, J. Bezamat, Mariagiovanna Sami, R. Sundblad, O. LeDortz, V. G. Goggi, T. T. Holmberg, C. Landi, P. Nayman, Renato Stefanelli, Jiren Yuan, S. Berglund, Aurore Savoy-Navarro
Publikováno v:
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment. 357:318-328
We describe the digital filter section of the FERMI readout microsystem. The filter section, consisting of two separate filter blocks, extracts the pulse amplitude and time information for the first-level trigger process and performs a highly accurat
Publikováno v:
CSE
Derived from a parallel multiplier, a parallel-serial decimal multiplier is proposed in which the multiplicand is assumed in parallel whereas the multiplier is in digit-serial form. A scheme for a parallel-serial decimal multiplier is presented, usin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cd371a65c3a6a88eb4541199170e358b
http://hdl.handle.net/11311/768882
http://hdl.handle.net/11311/768882
Autor:
Umberto Gatti, Renato Stefanelli, R. Sundblad, Per Carlson, O. LeDortz, P.W. Cattaneo, L. Dadda, Luca Breveglieri, J. David, Cesare Alippi, M. Engstrom, A. Dell'Acqua, Andras Kerek, Guido Torelli, Christian Bohm, H. Hentzell, J.P. Vanuxem, Magnus Hansen, P. Nayman, Franco Maloberti, G. Appelquist, G. Fumagalli, Jiren Yuan, S. Berglund, H. Lebbolo, J.F. Genat, Aurore Savoy-Navarro, L. Del Buono, I. Hoglund, S. Brigati, Fabio Salice, Mariagiovanna Sami, S.-T. Persson, S. Inkinen, Vincenzo Piuri, G. Goggi, C. Svensson, R. Zitoun, N. Yamdagni, B. Lofstedt
Publikováno v:
Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment. 344:180-184
A digital solution to the front-end electronics for calorimetric detectors at future supercolliders is presented. The solution is based on high speed A D converters, a fully programmable pipeline/digital filter chain and local intelligence. Questions
Autor:
S. Berglund, Fabio Salice, C. Fuglesang, Vincenzo Piuri, S. Brigati, C. SveNSSMICon, Andras Kerek, Magnus Hansen, H. Hentzell, Franco Maloberti, B. Lofstedt, G. Appelquist, Mariagiovanna Sami, R. Sundblad, V. G. Goggi, P.J. Carlson, Luca Breveglieri, Renato Stefanelli, N. Yamdagni, Jiren Yuan, Umberto Gatti, A. Dell'Acqua, C. Alippi, P.W. Cattaneo, J. P. Vanuxem, L. Dadda, G. Torelli, G. Fumagalli, Christian Bohm
Publikováno v:
IEEE Transactions on Nuclear Science. 40:516-531
The authors present a digital solution to the front-end electronics for calorimetric detectors at future supercolliders based on high-speed analog-to-digital converters, a fully programmable pipeline/digital filter chain, and local intelligence. Ques
Autor:
Alberto Nannarelli, L. Dadda
Publikováno v:
ISCAS
We consider the problem of adding the partial products in the combinational decimal multiplier presented by Lang and Nannarelli. In the original paper this addition is done with a tree of decimal carry-save adders. In this paper, we treat the problem
Autor:
L. Dadda
Publikováno v:
Journal of VLSI signal processing systems for signal, image and video technology. 2:17-27
It is shown that a cascade of carry-free serial-parallel multipliers, fed by bit-serial samples with no separation between successive samples (i.e., with maximum sampling rate for a given bit rate), produces one convolution value everyp withp>1. This
Publikováno v:
ICC
This paper introduces a hardware architecture for high speed network processors, focusing on support for quality of service in IPSec-dedicated systems. The effort is aimed at defining a secure system on chip environment, where the speed and security
Autor:
L. Dadda
Publikováno v:
VLSI Design
IH a previous paper a parallel input -parallel output convolver has been proposed, based on an arrav of subconvolvers characterized by one-bit sainples ("bitconvolvers'? and iinplemented as pipelined arrays of carry save accumulators. Each arrqv coni