Výsledky vyhledávání - "L, VandeVenter"

An evaluation of high rate filtration using particle counting and turbidimetry for low turbidity waters

Autor: L. VandeVenter, D. Nickols, Orren D. Schneider, S. Leggiero

Publikováno v: Water Supply. 2:249-258

A pilot-scale evaluation of high rate filtration using both on-line turbidimeters and optical on-line particle counters was performed. At turbidities approaching the detection limit of the equipment (less than 0.05 ntu), particle counting proved to b

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::b954efa1e510b0976c61f3a9b2ebb0f9
https://doi.org/10.2166/ws.2002.0030

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Using binary decision diagrams to speed up the test pattern generation of behavioral circuit descriptions written in hardware description languages

Autor: J.-F. Santucci, L. Vandeventer

Publikováno v: ISCAS
Proceedings of the IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94
IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94
IEEE International Symposium on Circuits and Systems, 1994. ISCAS '94, 1994, London, United Kingdom. pp.279-282, ⟨10.1109/ISCAS.1994.408809⟩

ISBN: 0-7803-1915-X website : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?isnumber=9169&arnumber=408809&count=123&index=69; International audience; In this paper, we focus on test pattern generation for circuit descriptions written in hardware des

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::dd223da6856ffdef3219abcb54e31929
https://doi.org/10.1109/iscas.1994.408809

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Speeding up behavioral test pattern generation using an algorithmicimprovement

Autor: N. Giambiasi, L. Vandeventer, J.F. Santucci

Publikováno v: Proceedings of 12th IEEE VLSI Test Symposium, 1994.
12th IEEE VLSI Test Symposium
12th IEEE VLSI Test Symposium, 1994, Cherry Hill, NJ, United States. pp.226-231, ⟨10.1109/VTEST.1994.292308⟩
VTS

webpage : http://ieeexplore.ieee.org/xpl/freeabs_all.jsp?isnumber=7228&arnumber=292308&count=71&index=35; International audience; n this paper, we focus on an improvement of test pattern generation for circuit descriptions written in hardware descrip

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::aaec0c1d2b1991ef70541daafe3fa3cd
https://hal.science/hal-00326750

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