Výsledky vyhledávání - "Kyuwon Ken Choi"

Akademický článek

A Reconfigurable CNN-Based Accelerator Design for Fast and Energy-Efficient Object Detection System on Mobile FPGA

Autor: Victoria Heekyung Kim, Kyuwon Ken Choi

Publikováno v: IEEE Access, Vol 11, Pp 59438-59445 (2023)

In limited-resource edge computing circumstances such as on mobile devices, IoT devices, and electric vehicles, the energy-efficient optimized convolutional neural network (CNN) accelerator implemented on mobile Field Programmable Gate Array (FPGA) i

Externí odkaz: https://doaj.org/article/8dd016694e2544e6956b081048872470

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Akademický článek

A Novel FPGA Accelerator Design for Real-Time and Ultra-Low Power Deep Convolutional Neural Networks Compared With Titan X GPU

Autor: Shuai Li, Yukui Luo, Kuangyuan Sun, Nandakishor Yadav, Kyuwon Ken Choi

Publikováno v: IEEE Access, Vol 8, Pp 105455-105471 (2020)

Convolutional neural networks (CNNs) based deep learning algorithms require high data flow and computational intensity. For real-time industrial applications, they need to overcome challenges such as high data bandwidth requirement and power consumpt

Externí odkaz: https://doaj.org/article/dcd2360477d3470883441cefc2b50db7

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A Novel 8T XNOR-SRAM: Computing-in-Memory Design for Binary/Ternary Deep Neural Networks

Autor: Nader Alnatsheh, Youngbae Kim, Jaeik Cho, Kyuwon Ken Choi

Publikováno v: Electronics
Volume 12
Issue 4
Pages: 877

Deep neural networks (DNNs) and Convolutional neural networks (CNNs) have improved accuracy in many Artificial Intelligence (AI) applications. Some of these applications are recognition and detection tasks, such as speech recognition, facial recognit

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::8267c1f26346777c37bf4e3e5e46a143

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Special Issue 'Novel Device for Computing-In Memory'

Autor: Nandakishor Yadav, Kyuwon Ken Choi

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::352edd9a98103de5995fbaa21acb83a1

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A Novel FPGA Accelerator Design for Real-Time and Ultra-Low Power Deep Convolutional Neural Networks Compared With Titan X GPU

Autor: Nandakishor Yadav, Yukui Luo, Shuai Li, Kyuwon Ken Choi, Kuangyuan Sun

Publikováno v: IEEE Access, Vol 8, Pp 105455-105471 (2020)

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::b3624c20ccbe9dac0536b9f32eca59d5
https://ieeexplore.ieee.org/document/9108269/

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Low-Power RTL Code Generation for Advanced CNN Algorithms toward Object Detection in Autonomous Vehicles

Autor: Young-Bae Kim, Shuai Li, Kyuwon Ken Choi, Nandakishor Yadav, Heekyung Kim

Publikováno v: Electronics
Volume 9
Issue 3
Electronics, Vol 9, Iss 3, p 478 (2020)

In the implementation process of a convolution neural network (CNN)-based object detection system, the primary issues are power dissipation and limited throughput. Even though we utilize ultra-low power dissipation devices, the dynamic power dissipat

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::0ec559b0271683ee0201e090fcd9d8a5

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Design and Development of BTI Model and 3D InGaAs HEMT-Based SRAM for Reliable and Secure Internet of Things Application

Autor: Nandakishor Yadav, Mahmoud Alashi, Kyuwon Ken Choi

Publikováno v: Electronics
Volume 9
Issue 3
Electronics, Vol 9, Iss 3, p 469 (2020)

It is broadly accepted that the silicon-based CMOS has touched its scaling limits and alternative substrate materials are needed for future technology nodes. An Indium-Gallium-Arsenide ( I n G a A s )-based device is well situated for further technol

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::4b6b70306fa2694bb0fc1b3412f70e81

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Sensitive, Linear, Robust Current-To-Time Converter Circuit for Vehicle Automation Application

Autor: Nandakishor Yadav, Kyuwon Ken Choi, Young-Bae Kim, Mahmoud Alashi

Publikováno v: Electronics, Vol 9, Iss 3, p 490 (2020)
Electronics
Volume 9
Issue 3

Voltage-to-time and current-to-time converters have been used in many recent works as a voltage-to-digital converter for artificial intelligence applications. In general, most of the previous designs use the current-starved technique or a capacitor-b

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::08769354085a307feaeeabec52c9084a
https://www.mdpi.com/2079-9292/9/3/490

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Stable, Low Power and Bit-Interleaving Aware SRAM Memory for Multi-Core Processing Elements

Autor: Shuai Li, Young-Bae Kim, Nandakishor Yadav, Kyuwon Ken Choi

Publikováno v: Electronics
Volume 10
Issue 21
Electronics, Vol 10, Iss 2724, p 2724 (2021)

The machine learning and convolutional neural network (CNN)-based intelligent artificial accelerator needs significant parallel data processing from the cache memory. The separate read port is mostly used to design built-in computational memory (CRAM

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::e4439440db6afc4e4291a1c3c551449a
https://doi.org/10.3390/electronics10212724

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A Novel Ultra-Low Power 8T SRAM-Based Compute-in-Memory Design for Binary Neural Networks

Autor: Nandakishor Yadav, Young-Bae Kim, Kyuwon Ken Choi, Shuai Li

Publikováno v: Electronics, Vol 10, Iss 2181, p 2181 (2021)
Electronics
Volume 10
Issue 17

We propose a novel ultra-low-power, voltage-based compute-in-memory (CIM) design with a new single-ended 8T SRAM bit cell structure. Since the proposed SRAM bit cell uses a single bitline for CIM calculation with decoupled read and write operations,

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::2ebe70acd9929efbe07c5776ec050693
https://doi.org/10.3390/electronics10172181

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