Zobrazeno 1 - 10
of 12
pro vyhledávání: '"KyungRok Park"'
Autor:
Michael G. Kelly, SangHyoun Lee, Ron Huemoeller, JinYoung Khim, WonChul Do, YoungDo Kweon, KwangSeok Oh, HyunHye Jung, MiKyeong Choi, DongSu Ryu, KyungRok Park
Publikováno v:
2020 IEEE 70th Electronic Components and Technology Conference (ECTC).
The capability and diversity of high-performance microprocessors is increasing with each process technology generation to meet increasing application demands. The cooling designs for these chips must deal with larger temperature gradients across the
Adopt Advanced RDL Rule to Apply Flip Chip Technology for Next Generation Si Node: Feasibility Study
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2013:1-11
With Si node shrinking to 28nm technology, smaller pitch of die pads becomes available so that more IO pads can be layed out. Sometimes the die requires flip chip packaging because of either functionality and performance requirement or cost effective
Autor:
HyunJin Park, Sung-Hwan Yang, Jesse Galloway, KyungRok Park, Ho-Beob Yu, Jeong-Han Choi, Siddharth Bhopte
Publikováno v:
Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT). 2013:000441-000454
Flip chip technology has traditionally been driven by electrical performance and package miniaturization, with application processors being primary drivers for devices like smart-phones and tablets. Today solder interconnect pitches, for both low-end
Autor:
Dwayne R. Shirley, Shengmin Wen, JeongSeok Lee, HyunJin Park, Patrick Thompson, KyungRok Park
Publikováno v:
2013 14th International Conference on Electronic Packaging Technology.
With silicon node technology shrinking to beyond 14nm, die pad pitch becomes smaller and bumps become finer dimensioned so that I/O pads can be laid out. In many cases, flip chip assembly is required because of layout considerations, performance, and
Autor:
KwangSeok Oh, DaeByoung Kang, Robert Lanzone, KyungRok Park, S. Y. Ma, Michael Oh, Juhoon Yoon, Ron Huemoeller, J. Sutanto
Publikováno v:
2013 IEEE 63rd Electronic Components and Technology Conference.
This paper describes the ongoing research and development at Amkor Technology of Chip-on-chip/Face to Face (CoC/F2F) technology being developed in parallel with Through Silicon Via (TSV) package assembly. Unlike other 3D packaging techniques using TS
Autor:
Curtis Zwenger, Shawn O'Connor, Min Yoo, C. Beddingfield, Robert Lanzone, KyungRok Park, DaeByoung Kang, Mark A. Gerber, Robert Francis Darveaux, Sung-Su Park, MinJae Lee
Publikováno v:
2011 IEEE 61st Electronic Components and Technology Conference (ECTC).
There has been a growing need for fine pitch flip chip technology in support of next generation communication devices with increasing die complexities. The increase in functionality which drives a larger number of signal I/O's in combination with sma
Autor:
Gerber, M., Beddingfield, C., O'Connor, S., Min Yoo, MinJae Lee, DaeByoung Kang, SungSu Park, Zwenger, C., Darveaux, R., Lanzone, R., KyungRok Park
Publikováno v:
2011 IEEE 61st Electronic Components & Technology Conference (ECTC); 2011, p612-618, 7p
Autor:
Tsai, Mike, Lan, Albert, Yao, Yan Han, Wu, Meng Yueh, Chang, Cheng Kai, Lo, Roger, Chen, Eason
Publikováno v:
2015 IEEE 65th Electronic Components & Technology Conference (ECTC); 2015, p465-469, 5p
Autor:
Hiner, David, Kim, Dong Wook, Ahn, SeokGeun, Kim, KeunSoo, Kim, HwanKyu, Lee, MinJae, Kang, DaeByoung, Kelly, Michael, Huemoeller, Ron, Radojcic, Riko, Gu, Sam
Publikováno v:
2015 IEEE 65th Electronic Components & Technology Conference (ECTC); 2015, p17-21, 5p
Publikováno v:
Advancing Microelectronics; Jul/Aug2020, Vol. 47 Issue 4, p31-38, 8p