Zobrazeno 1 - 10
of 12
pro vyhledávání: '"Kyu-Tae Sun"'
Autor:
Shinyoung Kim, Chris Park, Jaehee Hwang, Chanha Park, Youping Zhang, Nang-Lyeom Oh, Sean Park, Paul Tuffy, Kyu-Tae Sun, Hyunjo Yang, Jinhyuck Jun
Publikováno v:
SPIE Proceedings.
Aberration sensitivity matching between overlay metrology targets and the device cell pattern has become a common requirement on the latest DRAM process nodes. While the extreme illumination modes used demand that the delta in aberration sensitivity
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::dfa629d6619bac12c88673c2e979b6a3
https://doi.org/10.1117/12.2219467
https://doi.org/10.1117/12.2219467
Autor:
Moo-Young Seo, Dong-Gyu Park, Baukje Wisse, Yvon Chai, Jong-Mun Jeong, Jin-Moo Byun, Stefan Geerte Kruijswijk, Wei Guo, Hugo Augustinus Joseph Cramer, Thomas Theeuwes, Sharon Hsu, Steven Welch, Rui Zhang, Alok Verma, Giacomo Miceli, Sang-Hoon Jung, Rahul Khandelwal, Taeddy Kim, Hyun-Sok Kim, Yi Song, Kyu-Tae Sun
Publikováno v:
SPIE Proceedings.
The high-NA angle-resolved scatterometer YieldStar 1250D, with a small 12x12μm2 inspection area, has been used to inspect CD variation After Develop (ADI) and After Partition/Final Etch (APEI/AFEI) on various layers and features of a HVM DRAM proces
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::fee6ab7b87a96f62e6e077e7d07301ae
https://doi.org/10.1117/12.2220782
https://doi.org/10.1117/12.2220782
Autor:
Kyu-Tae Sun, Jong-Mun Jeong, Kevin Ryan, Min-Suk Kim, Michiel Kupers, Paul Böcker, Jin-Moo Byun, Inez Sochal, Gwang-Gon Kim, Jung-Joon Suh, Milenko Jovanović, Hwa-Yeon Won, Lydia Vergaij-Huizer, Young-Wan Lim
Publikováno v:
SPIE Proceedings.
In order to optimize yield in DRAM semiconductor manufacturing for 2x nodes and beyond, the (processing induced) overlay fingerprint towards the edge of the wafer needs to be reduced. Traditionally, this is achieved by acquiring denser overlay metrol
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b1d04c1ec94e95a2b61c7ef6b42f7d67
https://doi.org/10.1117/12.2220459
https://doi.org/10.1117/12.2220459
Autor:
Jongsu Lee, Steven Welch, Byounghoon Lee, Giacomo Miceli, Rui Zhang, Jin-Moo Byun, Stefan Geerte Kruijswijk, Sangjun Han, Noh-Jung Kwak, Kyu-Tae Sun, Won-Kwang Ma, Thomas Theeuwes, Young-Sik Kim, Sharon Hsu, Hugo Augustinus Joseph Cramer, Baukje Wisse, Yvon Chai, Yi Song, Alok Verma, Wei Guo
Publikováno v:
SPIE Proceedings.
Spacer multi patterning process continues to be a key enabler of future design shrinks in DRAM and NAND process flows. Improving Critical Dimension Uniformity (CDU) for main features remains high priority for multi patterning technology and requires
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::722c7c1779e899d45577382faa799c83
https://doi.org/10.1117/12.2219664
https://doi.org/10.1117/12.2219664
Autor:
Jung-Joon Suh, Won-Kwang Ma, Kyu-Tae Sun, David Deckers, Honggoo Lee, Kevin Ryan, Jin-Moo Byun, Sangjun Han, Kou Weitian, Paul Böcker, Michiel Kupers, Noh-Jung Kwak, Young-Sik Kim, Young-Wan Lim, Gwang-Gon Kim, Elliott McNamara
Publikováno v:
SPIE Proceedings.
As DRAM semiconductor manufacturing approaches high volume for 1x nm nodes with immersion lithography, an increased emphasis is being placed on reducing the influence of the systematic wafer-level contribution to the on-product overlay budget. The co
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7e06bd49bcc0a5c6e360cdc737af6d44
https://doi.org/10.1117/12.2196879
https://doi.org/10.1117/12.2196879
Autor:
Thomas Theeuwes, Michael Kubis, Daan Slotboom, Young-Wan Lim, Kyu-Tae Sun, Sungki Park, Emil Schmitt-Weaver, Jens Staecker, Honggoo Lee, Min-Suk Kim, Won-Taik Kwon, Sangjun Han, Kevin Ryan, Myoung-Soo Kim
Publikováno v:
SPIE Proceedings.
While semiconductor manufacturing moves toward the 7nm node for logic and 15nm node for memory, an increased emphasis has been placed on reducing the influence known contributors have toward the on product overlay budget. With a machine learning tech
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d2141aac6a260fc40c54755c189ba52f
https://doi.org/10.1117/12.2085475
https://doi.org/10.1117/12.2085475
Autor:
Sean Park, Nang-Lyeom Oh, Won-Taik Kwon, Mir Shahrjerdy, Jin-Moo Byun, Chris Park, Youping Zhang, Ji-Hwan Yoo, Paul Tuffy, Mi-Rim Jung, Roy Werkman, Kevin Ryan, Kyu-Tae Sun, Young-Sun Hwang, Young-Sik Kim
Publikováno v:
SPIE Proceedings.
In order to handle the upcoming 1x DRAM overlay and yield requirements, metrology needs to evolve to more accurately represent product device patterns while being robust to process effects. One way to address this is to optimize the metrology target
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d25c03e362403fa0d4cd130c7a2dd936
https://doi.org/10.1117/12.2085645
https://doi.org/10.1117/12.2085645
Autor:
Ewould van West, Jin-Soo Kim, Won-Kwang Ma, Myoung-Soo Kim, Kyu-Tae Sun, Peter Nikolsky, Maryana Escalante Marun, Won-Taik Kwon, Greet Storms, Sungki Park, Marian Otter, Young-Sik Kim, Roy Anunciado
Publikováno v:
Metrology, Inspection, and Process Control for Microlithography XXVIII.
In this paper we describe the joint development and optimization of the critical dimension uniformity (CDU) at an advanced 300 mm ArFi semiconductor facility of SK Hynix in the high volume device. As the ITRS CDU specification shrinks, semiconductor
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::1ae567d0bc5d284d39dc4280a2594586
https://doi.org/10.1117/12.2057390
https://doi.org/10.1117/12.2057390
Autor:
Hee-Youl Lim, Jun-Taek Park, Tae-Seung Eom, Eun-Ha Lee, Seung-Hyun Hwang, Sunyoung Koo, Sungki Park, Eun-Kyoung Shin, Yoon-Jung Ryu, Hye-Jin Shin, Noh-Jung Kwak, Kyu-Tae Sun, Sarohan Park
Publikováno v:
SPIE Proceedings.
In this paper, we will present applications of MoSi-based binary intensity mask for sub-40nm DRAM with hyper-NA immersion scanner which has been the main stream of DRAM lithography. Some technical issues will be reported for polarized illumination an
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54ff76899e922ee64919b860836b640f
https://doi.org/10.1117/12.846728
https://doi.org/10.1117/12.846728
Autor:
Yoon-Jung Ryu, Hye-Jin Shin, Tae-Seung Eom, Eun-Ha Lee, Kyu-Tae Sun, Seung-Hyun Hwang, Sarohan Park, Sungki Park, Noh-Jung Kwak, Eun-Kyoung Shin, Hee-Youl Lim
Publikováno v:
SPIE Proceedings.
In recent years, DRAM technology node has shrunk below to 40nm HP (Half Pitch) patterning with significant progresses of hyper NA (Numerical Aperture) immersion lithography system and process development. Especially, the development of DPT (Double Pa
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::670e4ba64369327cb491b79fe55576ae
https://doi.org/10.1117/12.846489
https://doi.org/10.1117/12.846489