Zobrazeno 1 - 10
of 39
pro vyhledávání: '"Kyu-Charn Park"'
Autor:
Harsono Simka, Kyu-Charn Park
Publikováno v:
2021 IEEE International Interconnect Technology Conference (IITC).
As the on-chip interconnect scales down to below 30nm pitch, it faces challenges in all aspects of performance, yield, and cost. Performance degradation caused by electron scattering in narrow Cu damascene lines, combined with slow barrier/liner scal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::afa509bea4484317cb00e6a6d8f7b106
https://doi.org/10.1109/iitc51362.2021.9537552
https://doi.org/10.1109/iitc51362.2021.9537552
Autor:
O. van der Straten, Scott DeVries, H. Seo, Motoyama Koichi, J. Maniscalco, Kisik Choi, Hsiang-Jen Huang, T. Shen, T. Wu, T. Bae, Nicholas A. Lanzillo, Kyu-Charn Park, Kangguo Cheng, S. Hosadurga, Terry A. Spooner
Publikováno v:
2020 IEEE International Interconnect Technology Conference (IITC).
It has been confirmed that Co diffusion from the cap into a Ru liner (resulting in Co depletion at the top of Cu lines) is the root cause of EM degradation for Cu interconnects in the case of using a combination of Ru liner and selective Co cap. Incr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::be7eea7ab9a583978ba550d4f01a719a
https://doi.org/10.1109/iitc47697.2020.9515591
https://doi.org/10.1109/iitc47697.2020.9515591
Autor:
J.H. Park, E. S. Jung, Kyu-Charn Park, Yoon-Jong Song, Se-Chung Oh, Hyeongsun Hong, Junha Lee, H. C. Shin, Dongsoo Lee, Sun-Kyu Hwang, D. E. Jeong, K. H. Lee, Byoung-Jae Bae, Y. Ji, Bum-seok Seo, Gwan-Hyeob Koh, Gitae Jeong, Kwan-Heum Lee, Ki-Hyun Hwang, You Kyoung Lee, H. K. Kang, Sung-hee Han, Kwang-Pyuk Suh, S.O. Park, O. I. Kwon
Publikováno v:
2018 IEEE International Electron Devices Meeting (IEDM).
We successfully demonstrated the manufacturability of 8Mb STT-MRAM embedded in 28nm FDSOI logic platform by achieving stable functionality and robust package level reliability. Read margin were greatly improved by increasing TMR value and also reduci
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::68d9850cefc79bd42bf976fcde3ed7b8
https://doi.org/10.1109/iedm.2018.8614635
https://doi.org/10.1109/iedm.2018.8614635
Autor:
Y.S. Bang, S. D. Kwon, Jung-Chak Ahn, Taejoong Song, Jaesuk Jung, J. H. Do, Y. Yasuda-Masuoka, Yun-Kyoung Lee, Byungha Choi, Hoonki Kim, Jong Shik Yoon, Y.D. Lim, Kyu-Charn Park
Publikováno v:
2018 IEEE Symposium on VLSI Technology.
11nm bulk FinFET process employing 3rd generation 14nm FEOL and 10nm BEOL process has been successfully demonstrated with updated design rules for optimal design kit support with 6.75T library. Compared to 14nm 1st generation FinFET, device performan
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6e4d8a167499f74977faa83ff33e6c12
https://doi.org/10.1109/vlsit.2018.8510694
https://doi.org/10.1109/vlsit.2018.8510694
Publikováno v:
Current Applied Physics. 12:174-178
It is known that CdTe solar cells are often degraded under solar illumination. But the degradation mechanism is not fully proved because it does not appear consistently. The junction degradation in CdS/CdTe solar cells was investigated using a CdTe l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7f724b4451c53af4412d72fd4496fe38
https://doi.org/10.1016/j.cap.2011.05.031
https://doi.org/10.1016/j.cap.2011.05.031
Publikováno v:
Current Applied Physics. 11:S109-S112
Low resistivity p-type ZnTe film was formed by close-spaced sublimation utilizing sodium compounds as sodium source for doping. Sodium was incorporated during film deposition with ZnTe sources containing various amount of Na 2 Te, Na 3 PO 4 , or NaCl
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6790f6fcb8c1e45182a6f69d50038739
https://doi.org/10.1016/j.cap.2010.11.042
https://doi.org/10.1016/j.cap.2010.11.042
Autor:
Byoung Yong Choi, Jong Jin Lee, Eun Suk Cho, Jeong-Dong Choe, Ilsub Chung, Donggun Park, Suk Kang Sung, Young-Joon Ahn, Kyu-Charn Park, Se-Hoon Lee, Jintae No
Publikováno v:
Japanese Journal of Applied Physics. 46:2197-2199
The effects of trap layer on NAND flash performances have been described in this paper. In order to overcome the slower programming speed of the discrete trap memory than conventional floating-gate device, nitride and silicon nanocrystal have been as
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::08f8d76e0300f2a37c30584069f8e4ba
https://doi.org/10.1143/jjap.46.2197
https://doi.org/10.1143/jjap.46.2197
Autor:
Gitae Jeong, Dae-Hwan Kang, S.Y. Kim, Sanghun Jeon, Jun-Soo Bae, Kyu-Charn Park, Jung-Chak Ahn, Ki-Hyun Hwang, Chilhee Chung, S.O. Park
Publikováno v:
Extended Abstracts of the 2010 International Conference on Solid State Devices and Materials.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9b32bf8c1a986ef0d3c792879ba52f90
https://doi.org/10.7567/ssdm.2010.e-8-5l
https://doi.org/10.7567/ssdm.2010.e-8-5l
Autor:
Se Joon Park, Dong-Hoon Jang, Jong Jin Lee, Kyu-Charn Park, Se-Hoon Lee, Woo-Jung Kim, Won Hwang, Jeong-Dong Choe, Young-bae Yoon, Eun Suk Cho, Tae-yong Kim, Young Joon Ann
Publikováno v:
2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop.
In this work we suggest recessed charge trap flash (RCTF) memory, which can avoid using a physical etch process to separate the charge trapping layer along the word line direction. The characterization of RCTF was carried out focusing on retention re
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c03cc07984a476991ae2b1b94164044d
https://doi.org/10.1109/nvsmw.2007.4290599
https://doi.org/10.1109/nvsmw.2007.4290599
Autor:
Jong Jin Lee, Jeong-Dong Choe, Donggun Park, Dong-Hoon Jang, Young-Joon Ahn, Kyu-Charn Park, Ilsub Chung, Young-bae Yoon, Se-Hoon Lee
Publikováno v:
2007 65th Annual Device Research Conference.
To improve P/E window of real NVM device, we have fabricated hybrid nanocrystal FinFET structures using state-of-the-art technologies such as TaN metal gate, atomic layer deposition (ALD) method, Al2O3 blocking dielectrics, post-deposition anneal (PD
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f59fe17194c2338b8c986742f38ae9d2
https://doi.org/10.1109/drc.2007.4373724
https://doi.org/10.1109/drc.2007.4373724