Zobrazeno 1 - 6
of 6
pro vyhledávání: '"Kyoung-Hwan Lim"'
Autor:
Yesin Ryu, Sung-Gi Ahn, Jae Hoon Lee, Jaewon Park, Yong Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Sukhan Lee, Kyoung-Hwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Joo, Dajung Cho, So Young Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae-San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O Kim, Kyomin Sohn, Sang-Joon Hwang, Jooyoung Lee
Publikováno v:
IEEE Journal of Solid-State Circuits. 58:1051-1061
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9c80db8e5f79af25b48cddf42ba40bee
https://doi.org/10.1109/jssc.2022.3232096
https://doi.org/10.1109/jssc.2022.3232096
Autor:
Yesin Ryu, Young-Cheon Kwon, Jae Hoon Lee, Sung-Gi Ahn, Jaewon Park, Kijun Lee, Yu Ho Choi, Han-Won Cho, Jae San Kim, Jungyu Lee, Haesuk Lee, Seung Ho Song, Je Min Ryu, Yeong Ho Yun, Useung Shin, Dajung Cho, Jeong Hoan Park, Jae-Seung Jeong, Sukhan Lee, Kyoung-Hwan Lim, Tae-Sung Kim, Kyungmin Kim, Yu Jin Cha, Ik Joo Lee, Tae Kyu Byun, Han Sik Yoo, Yeong Geol Song, Myung-Kyu Lee, Sunghye Cho, Sung-Rae Kim, Ji-Min Choi, Hyoung Min Kim, Soo Young Kim, Jaeyoun Youn, Myeong-O Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee
Publikováno v:
2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::00a99a13ae901f43741fcb5c71c87960
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830391
https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830391
Autor:
Jin-Hyun Kim, Eojin Lee, O Seongil, Kyomin Sohn, Hyun-Sung Shin, Shin-haeng Kang, Seung-Woo Seo, Hyeon-Su Kim, Nam Sung Kim, Jae-Hoon Lee, Anand Iyer, Seung-Won Lee, Hosang Yoon, Wang David T, Sukhan Lee, Kyoung-Hwan Lim
Publikováno v:
ISCA
Emerging applications such as deep neural network demand high off-chip memory bandwidth. However, under stringent physical constraints of chip packages and system boards, it becomes very expensive to further increase the bandwidth of off-chip memory.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::8b2804d162ad566ed49124cb5e302217
https://doi.org/10.1109/isca52012.2021.00013
https://doi.org/10.1109/isca52012.2021.00013
Publikováno v:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 32:392-405
Satisfying a clock skew constraint is one of the most important tasks in clock tree synthesis. Moreover, the task becomes much harder to solve when the clock tree is designed in a multiple power mode environment, in which the voltage applied to some
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f8a3cc8c251ecc61a9def86be36218f9
https://doi.org/10.1109/tcad.2012.2220769
https://doi.org/10.1109/tcad.2012.2220769
Publikováno v:
ISOCC
This paper overviews clock design problems related to the circuit reliability in deep submicron design technology. The topics include clock polarity assignment problem for reducing peak power/ground noise, clock mesh network design problem for tolera
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bce00a6e0e47c5a934de11dbc0496ae5
https://doi.org/10.1109/isocc.2011.6138667
https://doi.org/10.1109/isocc.2011.6138667
Publikováno v:
DAC
Distributed register-file microarchitecture (DRFM), which comprises multiple uniform blocks (called islands), each containing a dedicated register file, functional unit(s) and data-routing logic, has been known as a very attractive architecture for i
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::cdab7531b9519aec75b2a3ed57aab68e
https://doi.org/10.1145/1278480.1278672
https://doi.org/10.1145/1278480.1278672