Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Kyoung Seon Shin"'
Autor:
Hyun-Mi Kim, Jinho Han, Minseok Choi, Je-Seok Ham, Chan Kim, Kyoung-Seon Shin, Jeongmin Yang, Young-Su Kwon, Yong Cheol Peter Cho, Chun-Gi Lyuh, Jaehoon Chung
Publikováno v:
ETRI Journal, Vol 42, Iss 4, Pp 491-504 (2020)
We present AB9, a neural processor for inference acceleration. AB9 consists of a systolic tensor core (STC) neural network accelerator designed to accelerate artificial intelligence applications by exploiting the data reuse and parallelism characteri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::9ef0057f1f8dfc07bd921b88950bac39
https://doi.org/10.4218/etrij.2020-0134
https://doi.org/10.4218/etrij.2020-0134
Autor:
Kyoung-Seon Shin, Chun-Gi Lyuh, Jeongmin Yang, Minseok Choi, Yong Cheol Peter Cho, Hyun-Mi Kim, Chan Kim, Je-Seok Ham, Hyeji Kim, Young-Su Kwon, Jinho Han, Jaehoon Chung
Publikováno v:
ISCAS
In this demonstration, we present AB9 SoC system, a single-chip solution for AI application. It provides the reconfigurable and programmable architecture to support the general computations for a variety of neural networks. The AB9 SoC is implemented
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a5628ad51fdbb1f31650cbadc9149f1e
https://doi.org/10.1109/iscas51556.2021.9401074
https://doi.org/10.1109/iscas51556.2021.9401074
Autor:
Kyoung-Seon Shin, Yong Cheol Peter Cho, Hyun-Mi Kim, Jinho Han, Insan Jeon, Jeongmin Yang, Young-Su Kwon, Minseok Choi, Jaehoon Chung, Chan Kim, Chun-Gi Lyuh
Publikováno v:
ISOCC
AI processors are extending the application area into mobile and edge devices. The requirement of low power consumption which has been an essential factor in designing processors is now becoming the most critical factor for mobile AI processors to be
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7388d42af7cd2e7bbbc2ea3105c93274
https://doi.org/10.1109/isocc47750.2019.9078533
https://doi.org/10.1109/isocc47750.2019.9078533
Autor:
Hyun-Mi Kim, Kyoung Seon Shin, Young-Su Kwon, Chan Kim, Minseok Choi, Yong Cheol Peter Cho, Jeongmin Yang, Jinho Han, In San Jeon, Chun-Gi Lyuh, Jaehoon Chung
Publikováno v:
ICCE-Berlin
An implementation of Yolo-v2 image recognition and other testbenches for a deep learning accelerator is presented. This chip is the initial version of our on-going effort for a higher performance accelerator development. The accelerator is based on a
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::46bbf38b5f8b80656922f1ddcaa648ae
https://doi.org/10.1109/icce-berlin47944.2019.8966213
https://doi.org/10.1109/icce-berlin47944.2019.8966213
Autor:
Kyoung-Seon Shin, Jeongmin Yang, Chun-Gi Lyuh, Jaehoon Chung, Jinho Han, Young-Su Kwon, Minseok Choi, Yong Cheol Peter Cho, Hyun-Mi Kim, Chan Kim
Publikováno v:
AICAS
State-of-the-art neural network accelerators consist of arithmetic engines organized in a mesh structure datapath surrounded by memory blocks that provide neural data to the datapath. While server-based accelerators coupled with server-class processo
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::cbac2f1671c0d78944f2893eae202b71
https://doi.org/10.1109/aicas.2019.8771603
https://doi.org/10.1109/aicas.2019.8771603
Publikováno v:
IEIE Transactions on Smart Processing and Computing. 4:71-77
Upcoming ground-breaking applications for always-on tiny interconnected devices steadily demand two-fold features of processor cores: aggressively low power consumption and enhanced performance. We propose implementation of a novel superscalar low-po
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::068154f6269ccfc2247bd9b6321bdede
https://doi.org/10.5573/ieiespc.2015.4.2.071
https://doi.org/10.5573/ieiespc.2015.4.2.071
Autor:
Kyoung-Seon Shin, Seung Chul Kim, Igkyun Kim, Mi-Young Lee, Dukdong Lee, Seong Mo Park, Hee-Bum Jung, Hanjin Cho
Publikováno v:
ETRI Journal. 28:525-528
In this letter, we present a design of a single chip video decoder called advanced mobile video ASIC (A-MoVa) for mobile multimedia applications. This chip uses a mixed hardware/software architecture to improve both its performance and its flexibilit
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::987882f0b42b5628793555f2b930eb40
https://doi.org/10.4218/etrij.06.0206.0009
https://doi.org/10.4218/etrij.06.0206.0009
Autor:
Kyoung-Seon Shin, Igkyun Kim, Seong-Min Kim, Ki-Bum Suh, Nak-Woong Eum, Kyung-Soo Kim, Seongmo Park, Bontae Koo, Juhyun Park
Publikováno v:
ETRI Journal. 25:489-502
This paper presents an MPEG-4 video codec, called MoVa, for video coding applications that adopts 3G-324M. We designed MoVa to be optimal by embedding a cost-effective ARM7TDMI core and partitioning it into hardwired blocks and firmware blocks to pro
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::147b35a728aaaca0f1554c460c53d56f
https://doi.org/10.4218/etrij.03.0102.0019
https://doi.org/10.4218/etrij.03.0102.0019
Autor:
Songkuk Kim, Bontae Koo, Jihun Cha, Ig Kyun Kim, Kyoung-Seon Shin, K.B. Seo, Juhyun Park, Seong Mo Park
Publikováno v:
Proceedings of Workshop and Exhibition on MPEG-4 (Cat. No.01EX511).
This paper presents a MPEG-4 video codec (MoVa) that is based on an ARM core and AMBA. The MoVa includes an ARM embedded microprocessor and several hardwired modules, using pseudo-advanced microprocessors bus architecture (AMBA). The MoVa performs 30
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::12e7aa3c4049a670edb37b51eff1fc58
https://doi.org/10.1109/mpeg.2001.996457
https://doi.org/10.1109/mpeg.2001.996457