Zobrazeno 1 - 10
of 104
pro vyhledávání: '"Kwen-Siong Chong"'
Autor:
Xvpeng Zhang, Bingqiang Liu, Yaqi Zhao, Xiaoyu Hu, Zixuan Shen, Zhaoxia Zheng, Zhenglin Liu, Kwen-Siong Chong, Guoyi Yu, Chao Wang, Xuecheng Zou
Publikováno v:
Sensors, Vol 22, Iss 23, p 9160 (2022)
Achieving low-cost and high-performance network security communication is necessary for Internet of Things (IoT) devices, including intelligent sensors and mobile robots. Designing hardware accelerators to accelerate multiple computationally intensiv
Externí odkaz:
https://doaj.org/article/39691db0aa8a4962a268ecd31b543a06
Publikováno v:
IEEE Transactions on Biomedical Circuits and Systems. 16:807-821
Bio-inspired neuron models are the key building blocks of brain-like neural networks for brain-science exploration and neuromorphic engineering applications. The efficient hardware design of bio-inspired neuron models is one of the challenges to impl
Autor:
Bingqiang Liu, Jiajun Wu, Guoyi Yu, Juhui Li, Chao Wang, Ziyuan Wen, Kwen-Siong Chong, Le Yang, Xuan Huang, Jipeng Wang
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 11:725-738
With the growing interest of edge computing in the Internet of Things (IoT), Deep Neural Network (DNN) hardware processors/accelerators face challenges of low energy consumption, low latency, and data privacy issues. This paper proposes an energy-eff
Autor:
Juncheng Chen, Jun-Sheng Ng, Nay Aung Kyaw, Zhili Zou, Kwen-Siong Chong, Zhiping Lin, Bah-Hwee Gwee
Publikováno v:
2022 Asian Hardware Oriented Security and Trust Symposium (AsianHOST).
Autor:
Weng-Geng Ho, Jun-Sheng Ng, Juncheng Chen, Joseph S. Chang, Bah-Hwee Gwee, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Kwen-Siong Chong
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 11:343-356
We present a side-channel-attack (SCA) resistant asynchronous-logic (async-logic) Advanced Encryption Standard (AES) accelerator with dual-hiding SCA countermeasures, i.e. the amplitude moderation (vertical dimension) and the time moderation (horizon
Publikováno v:
IEEE Transactions on Circuits and Systems II: Express Briefs. 68:2122-2126
We propose a power-aware toggling-frequency actuator for an 1K-byte data-toggling SRAM. The actuator periodically toggles the stored data to balance the voltage stress in the SRAM cells to secure against data imprinting attacks. Our proposed actuator
Publikováno v:
2022 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).
Autor:
Juncheng Chen, Jun-Sheng Ng, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Kwen-Siong Chong, Zhiping Lin, Joseph Sylvester Chang, Bah-Hwee Gwee
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Autor:
Jun-Sheng Ng, Juncheng Chen, Nay Aung Kyaw, Ne Kyaw Zwa Lwin, Kwen-Siong Chong, Joseph Chang, Bah-Hwee Gwee
Publikováno v:
2022 IEEE International Symposium on Circuits and Systems (ISCAS).
Publikováno v:
IEEE Transactions on Information Forensics and Security. 16:3767-3779
In this paper, we propose two normalization techniques to reduce the ghost peaks occurring in Differential Power Analysis (DPA). Ghost peaks can be defined as the DPA output generated by the wrong key guesses, having higher amplitudes than the DPA ou