Výsledky vyhledávání - "Kunal Kishor"

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Assessing Economic Viability: A Comparative Analysis of Total Cost of Ownership for Domain-Adapted Large Language Models versus State-of-the-art Counterparts in Chip Design Coding Assistance

Autor: Sharma, Amit, Ene, Teodor-Dumitru, Kunal, Kishor, Liu, Mingjie, Hasan, Zafar, Ren, Haoxing

This paper presents a comparative analysis of total cost of ownership (TCO) and performance between domain-adapted large language models (LLM) and state-of-the-art (SoTA) LLMs , with a particular emphasis on tasks related to coding assistance for chi

Externí odkaz: http://arxiv.org/abs/2404.08850

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ChipNeMo: Domain-Adapted LLMs for Chip Design

ChipNeMo aims to explore the applications of large language models (LLMs) for industrial chip design. Instead of directly deploying off-the-shelf commercial or open-source LLMs, we instead adopt the following domain adaptation techniques: domain-adap

Externí odkaz: http://arxiv.org/abs/2311.00176

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Akademický článek

Trends and Patterns of Top Ten Common Cancers in Eastern India from 2014 to 2021: A Retrospective Hospital-based Cancer Registry Data Update

Autor: Shraddha Raj, Dinesh K. Sinha, Richa Madhawi, Seema Devi, Kunal Kishor, Rajesh K. Singh, Aman Prakash

Publikováno v: Indian Journal of Community Medicine, Vol 49, Iss 5, Pp 707-712 (2024)

Background: India is a vast and diverse country with existing variations in the frequency and distribution of cancers across its various parts. In regions lacking population-based cancer registries (PBCRs) in a vast country like India, hospital-based

Externí odkaz: https://doaj.org/article/4747981f0bff48ee9df2a5a27e61a7be

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GNNIE: GNN Inference Engine with Load-balancing and Graph-Specific Caching

Autor: Mondal, Sudipta, Manasi, Susmita Dey, Kunal, Kishor, Ramprasath, S., Sapatnekar, Sachin S.

Graph neural networks (GNN) analysis engines are vital for real-world problems that use large graph models. Challenges for a GNN hardware platform include the ability to (a) host a variety of GNNs, (b) handle high sparsity in input vertex feature vec

Externí odkaz: http://arxiv.org/abs/2105.10554

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A general approach for identifying hierarchical symmetry constraints for analog circuit layout

Autor: Kunal, Kishor, Poojary, Jitesh, Dhar, Tonmoy, Madhusudan, Meghna, Harjani, Ramesh, Sapatnekar, Sachin S.

Analog layout synthesis requires some elements in the circuit netlist to be matched and placed symmetrically. However, the set of symmetries is very circuit-specific and a versatile algorithm, applicable to a broad variety of circuits, has been elusi

Externí odkaz: http://arxiv.org/abs/2010.00051

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ALIGN: A System for Automating Analog Layout

Autor: Dhar, Tonmoy, Kunal, Kishor, Li, Yaguang, Madhusudan, Meghna, Poojary, Jitesh, Sharma, Arvind K., Xu, Wenbin, Burns, Steven M., Harjani, Ramesh, Hu, Jiang, Kirkpatrick, Desmond A., Mukherjee, Parijat, Sapatnekar, Sachin S., Yaldiz, Soner

ALIGN ("Analog Layout, Intelligently Generated from Netlists") is an open-source automatic layout generation flow for analog circuits. ALIGN translates an input SPICE netlist to an output GDSII layout, specific to a given technology, as specified by

Externí odkaz: http://arxiv.org/abs/2008.10682

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