Zobrazeno 1 - 10
of 289
pro vyhledávání: '"Kuan-Neng Chen"'
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 12, Pp 96-103 (2024)
In advanced packaging schemes, such as fan-out integration technology, photosensitive polyimide (PSPI) is the key material to the fabrication of panel level redistribution-layer (RDL). However, a large mismatch of coefficient of thermal expansion (CT
Externí odkaz:
https://doaj.org/article/b2fecd3d8efb4b17813d3cc6743df56b
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 11, Pp 473-479 (2023)
PVD-deposited Cu3N has been demonstrated for Cu-Cu bonding as a low-cost passivation material. Cu3N exhibits stability at room temperature but undergoes decomposition upon heating, making it an attractive candidate for Cu bonding passivation. XRD ana
Externí odkaz:
https://doaj.org/article/3ea4d3d903b24f3bbbb06894c9be0536
Autor:
Hao-Tung Chung, Yu-Ming Pan, Nein-Chih Lin, Bo-Jheng Shih, Chih-Chao Yang, Chang-Hong Shen, Huang-Chung Cheng, Kuan-Neng Chen
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 11, Pp 262-268 (2023)
This paper proposed a fabrication of p-type Germanium (Ge) tri-gate field-effect transistors (Tri-gate FETs) via green nanosecond laser crystallization (GNSLC) and counter doping (CD). By using the GNSLC, the nano-crystalline-Ge (nc-Ge) with a grain
Externí odkaz:
https://doaj.org/article/ef4cc10c6b1946188bd1a720f82eb48b
Publikováno v:
Memories - Materials, Devices, Circuits and Systems, Vol 4, Iss , Pp 100024- (2023)
The stress of TSV with different dimensions under annealing condition has been investigated. Since the application of TSV and bonding technology has demonstrated a promising approach for vertical connection in HBM stacking, the stress caused by Cu TS
Externí odkaz:
https://doaj.org/article/3f53c6bf2172485bb5723a22ae1d7c99
Publikováno v:
Nanomaterials, Vol 13, Iss 17, p 2490 (2023)
Advanced packaging technology has become more and more important in the semiconductor industry because of the benefits of higher I/O density compared to conventional soldering technology. In advanced packaging technology, copper–copper (Cu-Cu) bond
Externí odkaz:
https://doaj.org/article/f1275610d72949668a22059170c2ca79
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 10, Pp 791-796 (2022)
In this study, an advanced 2.3D solution was proposed to integrate RDL interposer and FR-4 substrate using the technique of hybrid soldering, which applies printing of epoxy solder paste to form the hybrid joint. The simulation was performed to evalu
Externí odkaz:
https://doaj.org/article/8d21684d5a534699b36a18c981a66fd4
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 9, Pp 868-875 (2021)
Fine pitch Cu/SiO2 hybrid bonding has been successfully demonstrated at a low temperature of 120 °C, a breakthrough, using Au passivation method in this work. To explore the bonding mechanism of passivation structures for hybrid bonding in details,
Externí odkaz:
https://doaj.org/article/b511054cfba543d4abbaf535d0de84f0
Autor:
Wen-Wei Shen, Yu-Min Lin, Shang-Chun Chen, Hsiang-Hung Chang, Tao-Chih Chang, Wei-Chung Lo, Chien-Chung Lin, Yung-Fa Chou, Ding-Ming Kwai, Ming-Jer Kao, Kuan-Neng Chen
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 6, Pp 396-402 (2018)
This paper describes a four-layer-stacked chip with 45-nm dynamic random access memory (DRAM) dice and 65-nm logic controller, which are interconnected by backside-via-last through-silicon via (TSV) processes. Fabrication of backside-via-last process
Externí odkaz:
https://doaj.org/article/1d238410db6a483cb1ab34389244d60e
Autor:
Chuan-An Cheng, Yu-Hsiang Huang, Chien-Hung Lin, Chia-Lin Lee, Shan-Chun Yang, Kuan-Neng Chen
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 5, Iss 2, Pp 136-140 (2017)
A reliable temporary bonding scheme with both inorganic amorphous silicon release layer and HD-3007 polyimide based on high 355-nm-wavelength laser absorption coefficient in release layer is proposed and investigated. Effects of laser absorption coef
Externí odkaz:
https://doaj.org/article/d38f78abb425406c92df1743e421e7f2
Publikováno v:
IEEE Journal of the Electron Devices Society, Vol 5, Iss 2, Pp 132-135 (2017)
A sealing redistribution layer (RDL) approach for the interposer fabrication is developed to simplify the conventional bottom-up process flow. By using this approach, bottom-up plating can achieve the integration of Cu-filler plating and its bottom R
Externí odkaz:
https://doaj.org/article/84660673dd754af093ba456322eb8c30