Zobrazeno 1 - 5
of 5
pro vyhledávání: '"Kozaburo Kurita"'
Publikováno v:
IEEE Journal of Solid-State Circuits. 26:585-589
Described is a phase-locked loop (PLL)-based BiCMOS on-chip clock generator (PCG), which is used to generate an internal clock synchronized to a reference clock from outside the chip. In order to obtain a very wide operation bandwidth, it is proposed
Publikováno v:
Electronics and Communications in Japan (Part II: Electronics). 72:1-9
To improve the speed of the processors for CPU of minicomputers and other systems, it is required to improve the machine cycle and the memory cycle, which are the performance indexes of the system. The general idea to realize a high-speed memory cycl
Autor:
Masahiro Iwamura, Tadaaki Bandoh, Hideo Maejima, S. Tanaka, Kozaburo Kurita, Atsuo Hotta, Tatsumi Yamauchi, Takashi Hotta
Publikováno v:
IEEE Journal of Solid-State Circuits. 23:500-506
The CMOS/bipolar standard cell library has been enhanced from 2 to 1.3 mu m for application to VLSI computers, such as 32-bit supermini- and microcomputers. This library has macrocells such as a 256-kb/8.4-ns ROM, 32-bit/4.5-ns carry propagation circ
Autor:
M. Ueno, Ikuro Masuda, Kozaburo Kurita, Hideo Maejima, Atsuo Hotta, Masahiro Iwamura, Takashi Hotta
Publikováno v:
IEEE Journal of Solid-State Circuits. 21:808-813
High-performance bipolar/CMOS (Hi-BiCMOS) technology, in which a bipolar transistor of 4-GHz cutoff frequency is combined with standard CMOS devices on the same chip, has been applied to a processor. The design strategy was to provide high integratio
Conference
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