Zobrazeno 1 - 9
of 9
pro vyhledávání: '"Korey Sewell"'
Autor:
Korey Sewell, Jeff Ringenberg
Publikováno v:
2012 ASEE Annual Conference & Exposition Proceedings.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f8abc91d33788727fa5c5a21734216c4
https://doi.org/10.18260/1-2--20883
https://doi.org/10.18260/1-2--20883
Autor:
David Fick, Dennis Sylvester, Korey Sewell, Trevor Mudge, Ronald G. Dreslinski, David Blaauw, Nathaniel Pinckney
Publikováno v:
IEEE Micro. 33:30-37
Supply-voltage scaling has stagnated in recent technology nodes, leading to so-called dark silicon. To increase overall chip multiprocessor (CMP) performance, it is necessary to improve the energy efficiency of individual tasks so that more tasks can
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::3159c3d281cb39ca907e2735288e7950
https://doi.org/10.1109/mm.2013.73
https://doi.org/10.1109/mm.2013.73
Autor:
Cieslak Michael Ronald, Nathaniel Pinckney, Geoffrey Blake, Trevor Mudge, Thomas Manville, Korey Sewell, Ronald G. Dreslinski, Thomas F. Wenisch, Dennis Sylvester, David Blaauw, Sudhir K. Satpathy, Reetuparna Das
Publikováno v:
IEEE Journal on Emerging and Selected Topics in Circuits and Systems. 2:278-294
This work revisits the design of crossbar and high-radix interconnects in light of advances in circuit and layout techniques that improve crossbar scalability, obviating the need for deep multi-stage networks. We employ a new building block, the Swiz
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::02faee5c33728ef2341933fc38b00d04
https://doi.org/10.1109/jetcas.2012.2193936
https://doi.org/10.1109/jetcas.2012.2193936
Autor:
Ali G. Saidi, Mark D. Hill, Derek R. Hower, Gabriel Black, Korey Sewell, Somayeh Sardashti, Muhammad Shoaib, Bradford M. Beckmann, Nilay Vaish, Arkaprava Basu, Nathan Binkert, Rathijit Sen, Steven K. Reinhardt, Joel Hestness, Tushar Krishna, Darien Wood
Publikováno v:
ACM SIGARCH Computer Architecture News. 39:1-7
The gem5 simulation infrastructure is the merger of the best aspects of the M5 [4] and GEMS [9] simulators. M5 provides a highly configurable simulation framework, multiple ISAs, and diverse CPU models. GEMS complements these features with a detailed
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b23abd0c2dcc37a9b26b5a4da4cdffe7
https://doi.org/10.1145/2024716.2024718
https://doi.org/10.1145/2024716.2024718
Autor:
Bharan Giridhar, David Blaauw, Qingkun Li, Nilmini Abeyratne, Ronald G. Dreslinski, Trevor Mudge, Korey Sewell, Reetuparna Das
Publikováno v:
HPCA
In this paper, we explore the challenges in scaling on-chip networks towards kilo-core processors. Current low-radix topologies optimize for fast local communication, but do not scale well to kilo-core systems because of the large number of routers r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::5b0bc1ec729910e534ace96831fc218f
https://doi.org/10.1109/hpca.2013.6522344
https://doi.org/10.1109/hpca.2013.6522344
Autor:
Korey Sewell, Sudhir K. Satpathy, Reetuparna Das, Nathaniel Pinckney, David Blaauw, Dennis Sylvester, Trevor Mudge, Thomas Manville, Ronald G. Dreslinski
Publikováno v:
PACT
With multi-core processors now mainstream, the shift to many-core processors poses a new set of design challenges. In particular, the scalability of coherence protocols remains a significant challenge. While complex Network-on-Chip interconnect fabri
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::c2c1463acd140e8372507569f78e5df6
https://doi.org/10.1145/2370816.2370829
https://doi.org/10.1145/2370816.2370829
Autor:
David Blaauw, Trevor Mudge, Thomas Manville, Ronald G. Dreslinski, Geoff Blake, Dennis Sylvester, Sudhir K. Satpathy, Korey Sewell, Thomas F. Wenisch, Reetuparna Das, Cieslak Michael Ronald, Nathaniel Pinckney
Publikováno v:
2012 IEEE Hot Chips 24 Symposium (HCS).
This article consists of a collection of slides from the author's conference presentation on Swizzle Switch networks for use in many-core systems. Some of the specific topics discussed include: the special features and design of swizzle-switch networ
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::bcff2c255cfd7b883563537c0ab5143e
https://doi.org/10.1109/hotchips.2012.7476481
https://doi.org/10.1109/hotchips.2012.7476481
Autor:
David Fick, Ronald G. Dreslinski, David Blaauw, Nathaniel Pinckney, Trevor Mudge, Korey Sewell, Dennis Sylvester
Publikováno v:
DAC
Supply voltage scaling has stagnated in recent technology nodes, leading to so-called "dark silicon." In this paper, we investigate the limit of voltage scaling together with task parallelization to maintain task completion latency. When accounting f
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::7931253350b1ab9320b12b408e6a906a
https://doi.org/10.1145/2228360.2228571
https://doi.org/10.1145/2228360.2228571
Autor:
Yen-Po Chen, Sudhir K. Satpathy, David Blaauw, Korey Sewell, Trevor Mudge, Thomas Manville, Ronald G. Dreslinski, Dennis Sylvester
Publikováno v:
ISSCC
High-speed and low-power routers form the basic building blocks of on-die interconnect fabrics that are critical to overall throughput and energy efficiency of high performance systems [1,2]. Conventional routers use distinct logic blocks for routing
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::40fd4cc2b047da187aede4a843f027ee
https://doi.org/10.1109/isscc.2012.6177098
https://doi.org/10.1109/isscc.2012.6177098