Zobrazeno 1 - 10
of 11
pro vyhledávání: '"Konrad J. Kulikowski"'
Publikováno v:
IET Communications. 5:2317-2327
For many devices and circuits, even a single fault can result in errors of a large Hamming weight at the output of a device, complicating the task of error detection and correction. Traditional error detection and correction techniques are based on l
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::82f7d2db69ee12f07f46d7cdf66bee69
https://doi.org/10.1049/iet-com.2011.0096
https://doi.org/10.1049/iet-com.2011.0096
Publikováno v:
Journal of Electronic Testing. 26:559-580
In this paper we propose memory protection architectures based on nonlinear single-error-correcting, double-error-detecting (SEC-DED) codes. Linear SEC-DED codes widely used for design of reliable memories cannot detect and can miscorrect lots of err
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::413e26e96288692087a835c4d7c4bac1
https://doi.org/10.1007/s10836-010-5168-5
https://doi.org/10.1007/s10836-010-5168-5
Publikováno v:
DSN
Linear single-error-correcting, double-error-detecting (SEC-DED) codes used in the design of reliable memories cannot detect and can miscorrect errors with large Hamming weights. We propose protection for memory devices based on extended Vasil'ev cod
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::4e95753539a05005aa55ed6fad84746b
https://doi.org/10.1109/dsn.2009.5270297
https://doi.org/10.1109/dsn.2009.5270297
Publikováno v:
FDTC
The adaptive and active nature of fault based side-channel attacks along with the large arsenal of fault injection methods complicates the design of effective countermeasures. To overcome the unpredictability of fault attackers protection methods bas
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::54fa237bfb430ba28fb371c455f92b52
https://doi.org/10.1109/fdtc.2008.13
https://doi.org/10.1109/fdtc.2008.13
Publikováno v:
DATE
Cryptographic hardware is vulnerable to power analysis attacks. To resist these attacks, special balanced dual-rail gates have been developed which have equal power consumption for all valid data values and transitions. A limitation of existing desig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::d9bc2f14154ac831282c22d7ec72cad9
https://doi.org/10.1145/1403375.1403685
https://doi.org/10.1145/1403375.1403685
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540465591
CHES
CHES
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite their benefits for security applications they have not been adapted to cur
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e09c8127e1e6f9333477d8d808b188f1
https://doi.org/10.1007/11894063_31
https://doi.org/10.1007/11894063_31
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540462507
FDTC
FDTC
Balanced gates are an effective countermeasure against power analysis attacks only if they can be guaranteed to maintain their power balance. Traditional testing and reliability methods are used primarily only to ensure the correctness of the logical
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::b757dd99ca8c1814282c0dd9c98e84fd
https://doi.org/10.1007/11889700_19
https://doi.org/10.1007/11889700_19
Publikováno v:
Lecture Notes in Computer Science ISBN: 9783540462507
FDTC
FDTC
Traditional hardware error detection methods based on linear codes make assumptions about the typical or expected errors and faults and concentrate the detection power towards the expected errors and faults. These traditional methods are not optimal
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::06f34fc055bc19e6a32152dcc12ba326
https://doi.org/10.1007/11889700_17
https://doi.org/10.1007/11889700_17
Publikováno v:
ASYNC
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as differential power analysis (DPA). This attack exploits data-dependent power consumption of a computation to determine the secret key. Dual-rail asynchronous circuits
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::6c8e97b53835f9a40dbd2adac4d8c91f
https://doi.org/10.1109/async.2005.18
https://doi.org/10.1109/async.2005.18
Publikováno v:
IFIP International Federation for Information Processing ISBN: 9781402081460
CARDIS
CARDIS
We present two architectures for protecting a hardware implementation of AES against side-channel attacks known as Differential Fault Analysis attacks. The first architecture, which is efficient for faults of higher multiplicity, partitions the desig
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9e24f4525b2e8a6c9bc965807f91ab11
https://doi.org/10.1007/1-4020-8147-2_12
https://doi.org/10.1007/1-4020-8147-2_12