Výsledky vyhledávání - "Ko Yoshikawa"

Energy-Efficient Convolution Module With Flexible Bit-Adjustment Method and ADC Multiplier Architecture for Industrial IoT

Autor: Tao Li, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh, Osamu Nomura

Publikováno v: IEEE Transactions on Industrial Informatics. 18:3055-3065

Offloading the unprecedented growing data to the edge exhibits a mainstream trend in the Industrial Internet of Things (IIoT) era, delivering far-reaching impacts in all aspects of our daily lives, including transportation, healthcare, and entertainm

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::26c49f21c8b68f1526a3440ec0b3fdca
https://doi.org/10.1109/tii.2021.3106242

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Corrections to 'Hybrid Signed Convolution Module With Unsigned Divide-and-Conquer Multiplier for Energy-Efficient STT-MRAM-Based AI Accelerator'

Autor: Tao Li, Yitao Ma, Ko Yoshikawa, Tetsuo Endoh

Publikováno v: IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 31:906-906

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::73d86e831538d8775427cf39b21d5adc
https://doi.org/10.1109/tvlsi.2023.3264100

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DOMINO LOGIC SYNTHESIS SYSTEM AND ITS APPLICATIONS

Autor: Y. Hagihara, Takeshi Yoshimura, Shigeto Inui, Yuichi Nakamura, Ko Yoshikawa

Publikováno v: Journal of Circuits, Systems and Computers. 15:277-287

We have developed a domino logic synthesis system with a new technology mapping algorithm based on a bin packing algorithm that reduces the levels of the circuits and considers the complexity of domino primitive cells. Domino logic circuits have 20�

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::0a54f71b01555b2f0b4fb6a27c7899d6
https://doi.org/10.1142/s0218126606003076

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An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs

Autor: Yuichi Nakamura, Takeshi Yoshimura, Ko Yoshikawa

Publikováno v: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences. :3351-3357

This paper describes a novel engineering change order (ECO) design method for large-scale, high performance LSIs, based on a patchwork-like partitioning technique. In conventional design methods, even when only small changes are made to the design af

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::daa423d248b9be88b96e7edb618ea34a
https://doi.org/10.1093/ietfec/e88-a.12.3351

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Logic Synthesizer with Optimizations in Two Phases

Autor: Ko Yoshikawa, Saburo Muroga

Publikováno v: The VLSI Handbook, Second Edition ISBN: 9780849341991
Electrical Engineering Handbook ISBN: 9780849385933

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_dedup___::81d0f650921804fea0e47b2cd359ee05
https://doi.org/10.1201/9781420005967.ch36

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Budgeting-free hierarchical design method for large scale and high-performance LSIs

Autor: Yuichi Nakamura, Takumi Okamoto, Shigeyoshi Tawada, Ko Yoshikawa, Mitsuru Tagata

Publikováno v: DAC

This paper describes a new hierarchical design method for large scale and high-performance LSIs, which eliminates the need to perform budgeting. The budgeting step in hierarchical design partitions the total propagation time constraint for a path bet

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::4429bdf93279ea570fa34c5dfb2fcfb4
https://doi.org/10.1145/1146909.1147151

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A fast hardware/software co-verification method for system-on-a-chip by using a C/C++ simulator and FPGA emulator with shared register communication

Autor: Yuichi Nakamura, Ichiro Kuroda, Takeshi Yoshimura, Kouhei Hosokawa, Ko Yoshikawa

Publikováno v: DAC

This paper describes a new hardware/software co-verification method for System-On-a-Chip, based on the integration of a C/C++ simulator and an inexpensive FPGA emulator. Communication between the simulator and emulator occurs via a flexible interface

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::fbafe75b7805029cb67d6eaa4e3aaa6d
https://doi.org/10.1145/996566.996655

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2313 A Study on Ignition Mechanism of CDI Multiple Spark Discharge in Flowing Mixtures

Autor: Kazuhiro Ishii, Ko Yoshikawa, Takao Fukushima

Publikováno v: The proceedings of the JSME annual meeting. :75-76

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::09a768ac458976068763b9968725de85
https://doi.org/10.1299/jsmemecjo.2008.3.0_75

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Timing optimization on mapped circuits

Autor: Ko Yoshikawa, S. Suzuki, N. Nornizu, A. Kondoh, H. Tanishita, H. Ichiryu

Publikováno v: DAC

This paper describes new techniques for timing optimization of CMOS or BiCMOS gate array or standard cell circuits. Based on previous works on critical path resynthsis, technolo y mapping algorithms using dynamic programming tecfmiques, and fanout op

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=doi_________::369757a57df386d49e180dd0161638f8
https://doi.org/10.1145/127601.127639

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