Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Klaus Danne"'
Publikováno v:
EURASIP Journal on Advances in Signal Processing, Vol 2003, Iss 6, Pp 594-602 (2003)
The implementation of large linear control systems requires a high amount of digital signal processing. Here, we show that reconfigurable hardware allows the design of fast yet flexible control systems. After discussing the basic concepts for the des
Externí odkaz:
https://doaj.org/article/34286f9ea44c43d4b3d91bd62b5e653a
Autor:
Cristiano Pereira, Justin Gottschlich, Gilles Pokam, Rolf Kassa, Nima Honarmand, Josep Torrellas, Tim Kranich, Shiliang Hu, Klaus Danne, Nathan Dautenhahn, Samuel T. King
Publikováno v:
ISCA
There has been significant interest in hardware-assisted deterministic Record and Replay (RnR) systems for multithreaded programs on multiprocessors. However, no proposal has implemented this technique in a hardware prototype with full operating syst
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::1c1fc1bff674b878a908e6c5f005a5f0
https://doi.org/10.1145/2508148.2485977
https://doi.org/10.1145/2508148.2485977
Publikováno v:
EURASIP Journal on Advances in Signal Processing, Vol 2003, Iss 6, Pp 594-602 (2003)
The implementation of large linear control systems requires a high amount of digital signal processing. Here, we show that re-configurable hardware allows the design of fast yet flexible control systems. After discussing the basic concepts for the de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::bc01d64e56af3110e0bf2435792c1109
https://doaj.org/article/34286f9ea44c43d4b3d91bd62b5e653a
https://doaj.org/article/34286f9ea44c43d4b3d91bd62b5e653a
Publikováno v:
MICRO
Prior work on HW support for memory race recording piggybacks time stamps on coherence messages and logs the outcome of memory races using point-to-point or chunk-based approaches. These memory race recorder (MRR) techniques are effective, but they r
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::27f7526a96d31d8bec9d4a03962cbfc0
https://doi.org/10.1145/1669112.1669183
https://doi.org/10.1145/1669112.1669183
Publikováno v:
FPL
This paper presents a prototype system that executes a set of periodic real-time tasks utilizing dynamic hardware reconfiguration. The proposed scheduling technique, MSDL, is not only able to give an offline guarantee for the feasibility of the task
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::39869e68ae312145ccdd267fcf8b6145
https://doi.org/10.1109/fpl.2006.311264
https://doi.org/10.1109/fpl.2006.311264
Autor:
Klaus Danne, Marco Platzner
Publikováno v:
FPL
This paper deals with scheduling periodic real-time tasks on reconfigurable hardware devices, such as FPGAs. Reconfigurable hardware devices are increasingly used in embedded systems. To utilize these devices also for systems with real-time constrain
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::23f04235252ee5f0bdd0d49bde15d6d3
https://doi.org/10.1109/fpl.2005.1515787
https://doi.org/10.1109/fpl.2005.1515787
Autor:
Klaus Danne, Sven Stühmeier
Publikováno v:
IFIP
Library in Computer Science ISBN: 0387275576
IESS
Library in Computer Science ISBN: 0387275576
IESS
We consider off-line task placement onto reconfigurable hardware devices (RHDs), which are increasingly used in embedded systems. The tasks are modelled as three dimensional boxes given by their footprint times execution time which results into a thr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::253570c32b4e4fcaaf2b07a51ecc68cf
https://doi.org/10.1007/11523277_30
https://doi.org/10.1007/11523277_30
Autor:
Marco Platzner, Klaus Danne
Publikováno v:
WISES
Todays reconfigurable hardware devices, such as FPGAs, have high densities and allow for the execution of several hardware tasks in parallel. This paper deals with scheduling periodic real-time tasks to such an architecture, a problem which has not b
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::912508e5c3b29fb21969004008e38054
https://doi.org/10.1109/wises.2005.1438720
https://doi.org/10.1109/wises.2005.1438720
Autor:
Klaus Danne
Publikováno v:
SBCCI
The partial runtime reconfiguration capability of FPGAs allows task execution in a multitasking manner. In contrasts to most other models, we assume that each task has several implementation variants with different performance and size. Moreover, one
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ad03236fdc97de9149d7f105e14ef0cc
https://doi.org/10.1145/1016568.1016608
https://doi.org/10.1145/1016568.1016608
Autor:
Christophe Bobda, Klaus Danne
Publikováno v:
IPDPS
Summary form only given. This work explores various solutions to implement an application using runtime reconfigurable field programmable gate arrays (FPGA). The example is a mechatronic control system which has to adapt its behavior from time to tim
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d7c60de109a86c95daaabeb6414c848f
https://doi.org/10.1109/ipdps.2004.1303116
https://doi.org/10.1109/ipdps.2004.1303116