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of 10
pro vyhledávání: '"Kiyotaka Ichiyama"'
Publikováno v:
ITC
In recent high-speed data transmissions, a multilevel signaling such as a pulse amplitude modulation (PAM) is adopted instead of binary signaling to enable higher data rate. For testing PAM receivers, stressed testing which utilizes test signal with
Publikováno v:
ITC
high-speed data transmissions with smallamplitude signals, since jitter and noise in the transmitted signal may cause bit errors at receiver side, stressed eye testing which tests receivers with a degraded signal becomes very important. This paper in
Autor:
Kiyotaka Ichiyama, Masahiro Ishida
Publikováno v:
ITC
This paper proposes a fast-Fourier-transform-based jitter separation and model-based bit-error-rate (BER) curve estimation technique for analyzing asymmetric total jitter distributions. The proposed method assumes asymmetric deterministic jitter mode
Publikováno v:
IEEE Design & Test of Computers. 29:63-71
This paper proposes a real-time testing method for multilevel signal interfaces. It utilizes multilevel drivers that can modulate both the voltage and timing of an output signal, and multilevel comparators based on a dynamic threshold concept. The au
Autor:
Kiyotaka Ichiyama, Masahiro Ishida
Publikováno v:
ITC
Recently, there is an increasing need for methods of functionally testing RF devices to provide lower cost alternatives to testing RF communication systems. This paper proposes an ATE system for testing RF devices with QAM signal interfaces. The syst
Publikováno v:
ITC
Recently, there is an increasing need for methods of functionally testing RF devices to provide lower cost alternatives to testing RF communication systems. In this paper, a real-time functional testing method of RF-ICs using a digital tester is prop
Publikováno v:
ITC
This paper proposes a method for testing a device with multi-level signal interfaces. This method utilizes multi-level drivers that generate multi-level signals and multi-level comparators that are based on a new concept. The multi-level drivers can
Publikováno v:
2010 53rd IEEE International Midwest Symposium on Circuits and Systems.
This paper describes the requirements and practical methods for on-chip built-in self-test (BIST) for high-frequency circuits and systems, considering input signal generation, measurement methods, and decision-making methods. Selected case studies in
Publikováno v:
ITC
A new method for identifying a deterministic jitter (DJ) model in a total jitter (TJ) distribution is introduced in this paper. The new method is based on the characteristic function and identifies the DJ model from the given TJ PDF contaminated by a
Publikováno v:
2006 IEEE International Test Conference; 2006, p1-8, 8p