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pro vyhledávání: '"Kittur, Harish"'
Autor:
Balikai, Vikas, Kittur, Harish
Publikováno v:
Circuit World, 2020, Vol. 47, Issue 1, pp. 71-85.
Externí odkaz:
http://www.emeraldinsight.com/doi/10.1108/CW-11-2019-0184
A Content Addressable Memory (CAM) is a memory primarily designed for high speed search operation. Parallel search scheme forms the basis of CAM, thus power reduction is the challenge associated with a large amount of parallel active circuits. We are
Externí odkaz:
http://arxiv.org/abs/1406.7662
Autor:
B., Ramkumar, Kittur, Harish M.
Based on the ASIC layout level simulation of 7 types of adder structures each of four different sizes, i.e. a total of 28 adders, we propose expressions for the width of each of the three regions of the final Carry Propagate Adder (CPA) to be used in
Externí odkaz:
http://arxiv.org/abs/1110.3584
In this work faster unsigned multiplication has been achieved by using a combination of High Performance Multiplication [HPM] column reduction technique and implementing a N-bit multiplier using 4 N/2-bit multipliers (recursive multiplication) and ac
Externí odkaz:
http://arxiv.org/abs/1110.3376
In this work faster Baugh-Wooley multiplication has been achieved by using a combination of two design techniques: partition of the partial products into two parts for independent parallel column compression and acceleration of the final addition usi
Externí odkaz:
http://arxiv.org/abs/1110.3281
Publikováno v:
In Engineering Science and Technology, an International Journal June 2015 18(2):135-140
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Autor:
Balikai, Vikas, Kittur, Harish
Publikováno v:
Circuit World; 2021, Vol. 47 Issue 1, p71-85, 15p
Publikováno v:
Journal of Artificial Intelligence. 6:154-160