Automatic generation of reprogrammable controllers in a high level synthesis environment

Autor: Benmohammed, M., Kission, P., Rahmouni, M., Liem, C., Jerraya, A.A.

Publikováno v: Technique et Science Informatiques
Technique et Science Informatiques, Hermès-Lavoisier, 1998, Dec. 1998; 17(10), pp.1277-97
Revue des Sciences et Technologies de l'Information-Série TSI : Technique et Science Informatiques
Revue des Sciences et Technologies de l'Information-Série TSI : Technique et Science Informatiques, Lavoisier, 1998, Dec. 1998; 17(10), pp.1277-97

In this paper we discuss the generation of reprogrammable controllers. This generation is performed by the use of an existing high-level synthesis environment initially intended to hardwired circuits. Starting from a high-level behavioral specificati

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::5e26b2776bdc2b42ca45c01e6fb6f213
https://hal.archives-ouvertes.fr/hal-00008097

Hardware reuse

Autor: Kission, P., Jerraya, A. A., Moussa, I.

Publikováno v: 2nd Workshop on Libraries, Component Modeling & Quality Assurance
2nd Workshop on Libraries, Component Modeling & Quality Assurance, Apr 1997, Toledo, Spain

International audience; In order to cope with the increasing design complexity, it is necessary to build new designs not from scratch but in reusing existing components. Design reuse is not limited to code fragments or small existing blocks (gates) b

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::640d0d289e963e2344d88341818208b7
https://hal.archives-ouvertes.fr/hal-01384938

Combining architectural simulation and behavioral synthesis

Autor: Jemai, A., Kission, P., Jerraya, A.A.

Publikováno v: IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, Institute of Electronics, Information and Communication Engineers, 1997, Oct. 1997; E80-A(10), pp.1756-66

The analysis of an architecture may provide statistic information on the use of the resources and on the execution time. Some of this information requires just a static analysis. Others, such as the execution time, may need dynamic analysis. Moreover

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::ee021d769996cdeac307d640a7f14776
https://hal.archives-ouvertes.fr/hal-00008112

CARI'96 : actes du 3ème colloque africain sur la recherche en informatique = CARI'96 : proceedings of the 3rd African conference on research in computer science

Autor: Benmohammed, M., Kission, P., Jerraya, A.A.

Ce papier traite de la synthèse automatique d'un contrôleur reprogrammable dans un environnement de synthèse de haut niveau. Partant d'une spécification comportementale de haut niveau décrivant la fonction du circuit, la synthèse de haut niveau

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=od_______932::55b73da39ea0aa1d1d4cad2015f68950
http://www.documentation.ird.fr/hor/fdi:010008771

High level specification in electronic design

Autor: Kission, P., Jerraya, Ahmed

Publikováno v: IEEE International Symposium on Industrial Electronics (ISIE'95)
IEEE International Symposium on Industrial Electronics (ISIE'95), Jul 1995, Athens, Greece. pp.21-26

International audience; Design complexity has been increasing exponentially. In order to cope with such an increase and to keep up designers' productivity, higher level specifications were required. Moreover, new synthesis systems, starting with a hi

Externí odkaz: https://explore.openaire.eu/search/publication?articleId=dedup_wf_001::1b91fe4c86084500d9e33a79c998bb18
https://hal.archives-ouvertes.fr/hal-00008132