Zobrazeno 1 - 10
of 16
pro vyhledávání: '"Khosrov Dabbagh Sadeghipour"'
Autor:
Meysam Mohammadi Khanghah, Amir Alipour Asl, Esmaeil Najafi Aghdam, Khosrov Dabbagh Sadeghipour
Publikováno v:
Analog Integrated Circuits and Signal Processing. 84:127-135
This paper presents a new background calibration technique employing an extra slow but accurate ADC for correcting the linear and nonlinear gain errors in pipelined ADCs. In comparison to the well-known skip---fill method, the proposed skip---swap al
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::27dd427ba2ce284cab1546c213deb5b6
https://doi.org/10.1007/s10470-015-0550-y
https://doi.org/10.1007/s10470-015-0550-y
Publikováno v:
Analog Integrated Circuits and Signal Processing. 79:161-169
This paper presents a new 0.5 V high-speed dynamic latch comparator with built-in foreground offset cancellation capability and rail-to-rail input range. Traditional latch comparators lose their speed performance in low voltage condition, especially
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::ae8114ed78f7c7185ae7587a92e6b86a
https://doi.org/10.1007/s10470-013-0239-z
https://doi.org/10.1007/s10470-013-0239-z
Autor:
Khosrov Dabbagh Sadeghipour
Publikováno v:
IEICE Electronics Express. 9:808-814
In this paper, a new accurate track and latch comparator circuit is presented. The Offset voltage of latch is compensated by negative feedback loop and the low offset voltage is achieved without pre-amplifiers. The pull up devices in modified regener
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::115315270e666c57e8a80b1efa3fc510
https://doi.org/10.1587/elex.9.808
https://doi.org/10.1587/elex.9.808
Autor:
Khosrov Dabbagh Sadeghipour
Publikováno v:
AEU - International Journal of Electronics and Communications. 65:799-805
A new wideband, high linear passive sample and hold (S/H) structure is presented. Reducing the sampling switch voltage dependency on input signal is the key idea to linearize conventional S/H structure. The sampling switch is immunized from signal de
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::a9cbf763d038265eebd3d2d8449607f0
https://doi.org/10.1016/j.aeue.2011.01.005
https://doi.org/10.1016/j.aeue.2011.01.005
Publikováno v:
IEICE Electronics Express. 8:902-907
In this paper, efficient reconfigurable finite-impulse response (FIR) filter architecture is presented based on a new coefficient representation method. The proposed binary signed subcoefficient method increases the common subexpressions and decrease
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::9a48dc13c6f328535c1fd1537e06d998
https://doi.org/10.1587/elex.8.902
https://doi.org/10.1587/elex.8.902
Autor:
Khosrov Dabbagh Sadeghipour
Publikováno v:
Analog Integrated Circuits and Signal Processing. 66:205-212
This paper presents a new high-speed and low offset latch comparator. The proposed offset compensation technique for latch comparator enables the preamplifier design relaxation for high-speed and high-resolution analog-to-digital converters. Employin
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::e41e13bf05da4cf85487e1596d6010c6
https://doi.org/10.1007/s10470-010-9509-1
https://doi.org/10.1007/s10470-010-9509-1
Publikováno v:
ISCAS
We1 present an analog front end for a PAM-4 clock and data recovery circuit designed in 65nm CMOS. The front end consists of an arrangement of 8 interleaved master and slave sample-and-hold circuits, to be followed by an array of dynamic comparators.
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::f4e892d3abf2dfb9c48800753d2c4a39
https://doi.org/10.1109/iscas.2015.7168956
https://doi.org/10.1109/iscas.2015.7168956
Publikováno v:
AEU - International Journal of Electronics and Communications. 60:217-223
A new high-speed successive approximation analog-to-digital converter (ADC) architecture is presented. Two-bits extraction in each clock cycle is the key idea to double the conversion speed. Generating reference levels for three comparators with only
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::d61af4b9fb215c236ae0efd1f058a74c
https://doi.org/10.1016/j.aeue.2005.03.006
https://doi.org/10.1016/j.aeue.2005.03.006
Autor:
Cormac Eason, Marc Rensing, Mark Power, Cleitus Antony, Khosrov Dabbagh Sadeghipour, Peter Ossieur, H. Wu, Paul D. Townsend, S. Zhou, Peter O'Brien, Carmelo Scarcella
Publikováno v:
Electronics Letters. 52:1939-1940
A push–pull silicon photonic Mach–Zehnder modulator (MZM) driver is presented which uses a switched capacitor approach to generate a ∼2 V peak-to-peak differential 4-level pulse amplitude modulation (PAM-4) signal. The driver chip includes a Gr
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_________::65ca7ed1f338fb160c2848289b639799
https://doi.org/10.1049/el.2016.2418
https://doi.org/10.1049/el.2016.2418
Autor:
Cormac Eason, Shiyu Zhou, Peter O'Brien, Paul D. Townsend, Carmelo Scarcella, Mark Power, Hsin-ta Wu, Marc Rensing, Cleitus Antony, Khosrov Dabbagh Sadeghipour, Peter Ossieur
Publikováno v:
Optics Express. 25:4312
We demonstrate how to optimize the performance of PAM-4 transmitters based on lumped Silicon Photonic Mach-Zehnder Modulators (MZMs) for short-reach optical links. Firstly, we analyze the trade-off that occurs between extinction ratio and modulation
Externí odkaz:
https://explore.openaire.eu/search/publication?articleId=doi_dedup___::17a56525a3ae8952c7abae2317baa916
https://doi.org/10.1364/oe.25.004312
https://doi.org/10.1364/oe.25.004312