Zobrazeno 1 - 10
of 18
pro vyhledávání: '"Kevin M. Lepak"'
Autor:
Sean White, Samuel D. Naffziger, Gabriel H. Loh, Mahesh Subramony, Noah Beck, Thomas Burd, Kevin M. Lepak
Publikováno v:
ISCA
For decades, Moore's Law has delivered the ability to integrate an exponentially increasing number of devices in the same silicon area at a roughly constant cost. This has enabled tremendous levels of integration, where the capabilities of computer s
Publikováno v:
DATE
Chiplet-based architectures have recently started attracting a lot of attention, and we are seeing real-world architectures utilizing chiplet technologies in high-volume commercial production in multiple mainstream markets. In this special session pa
Publikováno v:
ISSCC
AMO's “Rome” and “Matisse” are second-generation AMD Infinity Fabric-based SoCs using 3 unique hybrid process technology chiplets to achieve leading performance, performance/$ and performance/W, targeting server and client markets, respective
Publikováno v:
Hot Chips Symposium
Publikováno v:
IEEE Micro. 30:16-29
The 12-core AMD Opteron processor, code-named "Magny Cours," combines advances in silicon, packaging, interconnect, cache coherence protocol, and server architecture to increase the compute density of high-volume commodity 2P/4P blade servers while o
Publikováno v:
ACM Transactions on Design Automation of Electronic Systems. 9:290-309
In this article, we first show that existing net ordering formulations to minimize noise are no longer sufficient with the presence of inductive noise, and shield insertion is needed to minimize inductive noise. Using a K eff model as the figure of m
Autor:
Mikko H. Lipasti, Kevin M. Lepak
Publikováno v:
ASPLOS
Recent work has shown that silent stores--stores which write a value matching the one already stored at the memory location--occur quite frequently and can be exploited to reduce memory traffic and improve performance. This paper extends the definiti
Publikováno v:
ACM SIGARCH Computer Architecture News. 29:27-36
We present the design of a PowerPC-based simulation infrastructure for architectural research. Our infrastructure uses an execution-driven out-of-order processor timing simulator from the SimpleScalar tool set. While porting SimpleScalar to the Power
Publikováno v:
IEEE Transactions on Computers. 50:1174-1190
Value locality, a recently discovered program attribute that describes the likelihood of the recurrence of previously seen program values, has been studied enthusiastically in the recent published literature. Much of the energy has focused on refinin
Publikováno v:
2009 IEEE Hot Chips 21 Symposium (HCS).